Technical data

Programming Details
MVME4100 Single Board Computer Programmer’s Reference (6806800H19B)
58
LA[28:31] Resistors 1000
533
MHz
CCB clock PLL
ratio (CBB
clock:SYSCLK)
0000 16:1
0100 2:1
0011 3:1
0100 4:1
0101 5:1
0110 6:1
1000 8:1
1001 9:1
1010 10:1
1100 12:1
1101 20:1
LWE[0] PLD 1 PCI1 speed 0 PCI at or below 33 MHz; PCI-X
at 66 MHz
1PCI above 33MHz; PCI-X
above 66 MHz
LWE[1:3]_L PLD 111 Host/agent
configuration
000 Agent of RapidIO and PCI
Express; host for PCI1/PCI-X
001 Agent of a RapidIO; host PCI
Express and PCI1/PCI-x
010 Endpoint PCI Express; host
RapidIO and PCI/PCI-X
011 Reserved
100 Agent PCI1/PCI-X and
RapidIO; root complex PCI
Express
110 Agent PCI1/PCI-X; host
RapidIO; root complex PCI
Express
111 Host processor/root complex
Table 4-1 MPC8548E POR Configuration Settings (continued)
MPC8548E
Signal
Select
Option
Default
POR
Setting Description State of Bit vs. Function