Technical data

Register Descriptions
MVME4100 Single Board Computer Programmer’s Reference (6806800H19B)
46
3.1.21 PLD Revision Register
The MVME4100 provides a PLD revision register that can be read by the system software to
determine the current revision of the timers/registers PLD.
3.1.22 PLD Date Code Register
The MVME4100 PLD provides a 32-bit register which contains the build date code of the
timers/registers PLD.
Table 3-24 PLD Revision Register
REG PLD Revision Register - 0xF200 0030
BIT 7654321 0
Field PLD_REV
OPER R
RESET 01
PLD_REV 8-bit field containing the current timer/register PLD revision. The revision number starts
with 01.
Table 3-25 PLD Date Code Register
REG Date Code Register 1 - 0xF200 0034
BIT 31:24 23:16 15:8 7:0
Field yy mm dd vv
OPER R
RESET xxxx
yy Last two digits of year
mm Month