Technical data

Register Descriptions
MVME4100 Single Board Computer Programmer’s Reference (6806800H19B)
41
3.1.14 NAND Flash Chip 2 Select Register
The MVME4100 provides a Select Register for the NAND Flash device.
WP Write Protect. If cleared, WP is not asserted when the device is accessed. If set, WP is
asserted when the device is accessed.
ALE Address Latch Enable. If cleared, ALE is not asserted when the device is accessed. If set, ALE
is asserted when the device is accessed.
CLE Command Latch Enable. If cleared, CLE is not asserted when the device is accessed. If set,
CLE is asserted when the device is accessed.
RSVD Reserved for future implementation.
Table 3-17 NAND Flash Chip 2 Select Register
REG NAND Flash Chip 2 Select Register - 0xF200 0019
BIT76543210
Field CE1 CE2 CE3 CE4 RSVD RSVD RSVD RSVD
OPER R/W R
RESET00000000
CE4 Chip Enable 4. If cleared, CE4 is not asserted when the device is accessed. If set, CE4 is
asserted when the device is accessed.
CE3 Chip Enable 3. If cleared, CE3 is not asserted when the device is accessed. If set, CE3 is
asserted when the device is accessed.
CE2 Chip Enable 2. If cleared, CE2 is not asserted when the device is accessed. If set, CE2 is
asserted when the device is accessed.
CE1 Chip Enable 1. If cleared, CE1 is not asserted when the device is accessed. If set, CE1 is
asserted when the device is accessed.
RSVD Reserved for future implementation.