Technical data

Register Descriptions
MVME4100 Single Board Computer Programmer’s Reference (6806800H19B)
37
PCI_2_SPD PCI Bus 2 Speed. Indicates the frequency of PCI bus 2.
00: 33 MHz
01: 66 MHz
10: 100 MHz
11: 133 MHz
PCIX_2 PCI-X Bus 2. A set condition indicates that bus 2 is operating in PCI-X mode. Cleared
indicates PCI mode.
PCI_2_64B PCI Bus 2 64-bit. A set condition indicates that bus 2 is enabled to operate in 64-bit
mode. Cleared indicates 32-bit mode.
5.0V_VIO 5.0V VIO Enabled. This bit set indicates that the PMC bus (PCI Bus 2) is configured for
5.0V VIO.
3.3V_VIO 3.3V VIO Enabled. This bit set indicates that the PMC bus (PCI Bus 2) is configured to
3.3V VIO.
Table 3-11 PCI Bus 3 Status Register
REG PCI Bus 3 Status Register - 0xF200 000A
BIT76543 210
Field RSVD RSVD RSVD RSVD PCI_3_64B PCIX_3 PCI_3_SPD
OPERRRRRR RRR
RESET00000 000
PCI_3_SPD PCI Bus 3 Speed. Indicates the frequency of PCI bus 3.
00: 33 MHz
01: 66 MHz
10: 100 MHz
11: 133 MHz
PCIX_3 PCI-X Bus 3. A set condition indicates that bus 3 is operating in PCI-X mode. Cleared
indicates PCI mode.
PCI_3_64B PCI Bus 3 64-bit. A set condition indicates that bus 3 is enabled to operate in 64-bit
mode. Cleared indicates 32-bit mode.
RSVD Reserved for future implementation.