Technical data
Memory Maps
MVME4100 Single Board Computer Programmer’s Reference (6806800H19B)
22
2.1.3 PCI Memory Map
The following table is the suggested PCI memory map for each PCI bus. This table reflects the
address map implemented by the board level firmware at release time.
E000 0000 EFFF FFFF 256 MB Not used
F000 0000 F07F FFFF 8 MB PCI 0 I/O Space
F080 0000 F0FF FFFF 8 MB PCI 1 I/O Space
F100 0000 F10F FFFF 1 MB MPC8548E CCSR
F110 0000 F1FF FFFF 15 MB Not used
F200 0000 F200 FFFF 64 KB Status/Control Registers
F201 0000 F201 FFFF 64 KB UARTs
F202 0000 F202 FFFF 64 KB Timers
F203 0000 F203 FFFF 64 KB NAND Flash
F204 0000 F23F FFFF 3.9 MB Not used
F240 0000 F247 FFFF 512 KB MRAM
F248 0000 F7FF FFFF 91.5 MB Not used
F800 0000 FFFF FFFF 128 MB NOR Flash
Table 2-2 Suggested Processor Address Map (continued)
Processor Address
Size DefinitionStart End
Table 2-3 PCI Memory Map
Processor Address
Size Definition NotesStart End
0000 0000 top_dram - 1 dram_size System Memory
(on-board DRAM)