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10009109-01 ATCA-9305 User’s Manual
3-1
Section 3
Cavium Processor Complex
The ATCA-9305 provides two Cavium processor complexes. The major devices on each
complex consist of the Cavium CN5860 processor, two StratixGX bridges, SDRAM,
RLDRAM®, an I
2
C EEPROM, socketed ROM, Flash, and the PCI bus interface.
Figure 3-1: Cavium Processor Complex Block Diagram
CAVIUM CN5860 PROCESSOR
The main features of the CN5860 include:
Table 3-1: CN5860 Features
Feature: Description:
Processor Core Up to 16 cnMIPS™ cores
Core Speed
Network Services Processor (NSP)
up to 800 MHz, processing up to 30 million packets per second
System Packet Interface Two SPI-4.2 ports
L2 Cache 2 MB, eight-way set associative
DRAM 144-bit DDR2 DRAM interface
RLDRAM 18-bit RLDRAM, low-latency memory direct access
PCI 64-bit, PCI 2.3 compatible