Instruction manual

ControlWaveLP Contents / 0 - 1
CI-ControlWaveLP
LOW POWER ControlWave
PROCESS AUTOMATION CONTROLLER
TABLE OF CONTENTS
SECTION TITLE PAGE #
Section 1 - INTRODUCTION
1.1 GENERAL DESCRIPTION .......................................................................................... 1-1
1.2 ControlWave PROGRAMMING ENVIRONMENT ...................................................... 1-2
1.3 PHYSICAL DESCRIPTION .......................................................................................... 1-4
1.3.1 CPU Board ..................................................................................................................... 1-4
1.3.1.1 CPU Board Connectors .................................................................................................. 1-7
CPU Bd. Communication Port Connectors J1 - J5
................................................. 1-7
CPU Bd. Memory Expansion Connector J9
............................................................ 1-7
CPU Bd. Connectors J10 & J11 - PC/104 Bus (CPU Bd. To FMI/OB Bd.)
........... 1-7
CPU Bd. PLD JTAG Connectors J12 & J24
........................................................... 1-8
CPU Bd. CPU JTAG Connector J13
....................................................................... 1-8
CPU Bd. Manufacturing Test Power Connector J14
............................................. 1-8
CPU Bd. Connector J15 - Port 80 Diagnostics
....................................................... 1-8
1.3.1.2 CPU Board User Configuration Jumpers ....................................................................1-8
CPU Bd. Jumper JP1A - Expansion Card Battery Enable
....................................... 1-9
CPU Bd. Jumper JP1B - On-board SRAM & RTC Battery Enable/Disable
............ 1-9
CPU Bd. Jumper JP1C - OSCOFF Enable/Disable
................................................... 1-9
CPU Bd. Jumper JP2 - IRQ15 Source Select
............................................................. 1-9
CPU Bd. Jumper JP3A - Expansion SRAM Relocation
............................................ 1-9
CPU Bd. Jumper JP3B - DX4 Clock Multiply Select
................................................ 1-9
CPU Bd. Jumper JP3C - DX4 Write Back / Write Through
..................................... 1-9
CPU Bd. Jumper JP4A - ULP80486 Enable/Disable
................................................ 1-9
CPU Bd. Jumper JP4B - ULP HLDA Jumper
........................................................... 1-9
CPU Bd. Jumper JP4C - ULP SMIACT
................................................................... 1-10
1.3.1.3 CPU Board Switches ....................................................................................................1-10
CPU Bd. Configuration Switch SW1 (COM3 - RS-232/RS-485)
.......................... 1-10
CPU Bd. Switch SW2 – Soft Switch, FLASH Write & Force Recovery
.............. 1-10
CPU Bd. Momentary Switch SW3 - CPU Reset
................................................... 1-11
CPU Bd. DIP Switch SW4
..................................................................................... 1-11
1.3.1.4 CPU Board Batteries................................................................................................. 1-11
1.3.2 Power Supply/Sequencer Board................................................................................... 1-11
1.3.2.1 PSSB Switches........................................................................................................... 1-14
1.3.2.2 PSSB Board Jumpers................................................................................................ 1-14
1.3.2.3 PSSB Board Fuse F1................................................................................................. 1-14
1.3.2.4 PSSB Board Connectors............................................................................................ 1-14
PSSB Bd. Terminal Block Connector TB1
............................................................ 1-14
PSSB Bd. Terminal Block Connector TB2
............................................................ 1-14
PSSB Bd. Connector J1
.......................................................................................... 1-14
1.3.2.5 PSSB Board Test Points ...........................................................................................1-14
1.3.3 The Fixed Multifunction Input/Output Board ............................................................ 1-15
1.3.3.1 FMI/OB Board Fixed I/O Subsystems......................................................................1-16
FMI/OB Bd. Discrete Inputs
.................................................................................. 1-16
FMI/OB Bd. Discrete Outputs
............................................................................... 1-16
FMI/OB Bd. Analog Inputs
.................................................................................... 1-17
FMI/OB Bd. High Speed Counter Inputs
............................................................. 1-18