Instruction manual
ControlWaveLP Introduction / 1-9
Table 1-2 - CPU Board Default Jumper Settings (Continued)
JUMPER Open Installed
JP3A - Expansion SRAM Relocation Jumper
⌦
JP3B - DX4 Clock Multiply Select
⌦
JP3C - Write Back / Write Thru Cache Select
⌦
JP4A - ULP Disable Jumper
⌦
JP4B - ULP HLDA Jumper
⌦
JP4C - ULP SMIACT Jumper
⌦
Note: The following CPU Board Jumpers are currently unused: JP1A, JP2 & JP3A.
CPU Bd. Jumper JP1B - On-board SRAM & RTC Battery Enable/Disable
Jumper JP1B provides the on-board SRAM and RTC battery enable/disable function. If the
jumper is not installed, the on-board SRAM & RTC battery (S2) are isolated from the load.
If the jumper is installed, the on-board SRAM & RTC battery (S2) are enabled for SRAM
and CMOS RAM data retention.
CPU Bd. Jumper JP1C - OSCOFF Enable/Disable
Jumper JP1C provides the OSCOFF signal enable/disable function for the R400EX control
of the clock chip. If the jumper is not installed, the R400EX control of the clock chip is
disabled. If the jumper is installed, the R400EX is enabled to use the OSCOFF signal to
turn off the clock chip outputs.
CPU Bd. Jumper JP3B - DX4 Clock Multiply Select
When Jumper JP3B is not installed, the DX4 internal clock is tripled. When JP3B is
installed, the DX4 internal clock is doubled.
CPU Bd. Jumper JP3C - DX4 Write Back / Write Through
When Jumper JP3C is not installed, the DX4 Cache uses a Write Back policy regarding the
main memory updates. When JP3C is installed, the DX4 Cache uses a Write Through policy
regarding the main memory updates.
CPU Bd. Jumper JP4A - ULP80486 Enable/Disable
(see Table 1-3)
JP4A is provided to accommodate enabling or disabling the 80486ULP Microprocessor.
Table 1-3 - Jumper JP4A - 80486 ULP Enable/Disable
JP4A Open Installed
ULP Disable
Jumper
ULP80486SX drives
its outputs
ULP80486SX floats its outputs (except for HLDA and
SMIACT). JP4A and JP4C must be removed in order to
populate the DX4 socket.
CPU Bd. Jumper JP4B - ULP HLDA Jumper
(see Table 1-4)
Table 1-4 - Jumper JP4B - ULP HLDA Jumper
JP4B Open Installed
ULP HLDA
Jumper
The HLDA output from the 80486ULP is
isolated from the $CPU.HLDA signal,
allowing the DX4 socket to drive HLDA.
ULP drives the $CPU.HLDA signal. Do
not populate the DX4 socket.