Instruction manual

ControlWaveLP Introduction / 1-7
The BIOS is contained in a single 512 Kbyte boot-block FLASH IC (FBD). The FBD resides
on the ISA bus and operates at 3.3V. It is configured for 8-bit access. Three Switches,
SW2A, SW2B and SW2C are used in conjunction with the BIOS (see Section 1.3.1.3).
The CPU Board contains provisions for 4MB of 3.3V, industrial temperature FLASH to be
soldered onto the CPU card. The FLASH memory is a linear array of 16 Mbit parts
configured for 32-bit read access (32-bit write access) and is connected to the 486 local bus.
CPU Board Switch SW2-D provides FLASH download control (where ON = FLASH
download enable and OFF = FLASH download disable.
The base version of the CPU Board has 2MB of soldered-down system SRAM, implemented
with four 512K x 8 70nS asynchronous SRAMs configured as a 512K x 32-bit array. During
periods of power loss, the SRAM is placed in a data retention mode, and powered by a 3V
lithium battery. The SRAM is configured for 32-bit accesses and is connected to the 486
local bus. The SRAM operates at 3.3V and is packaged in a 32-pin TSOP. An additional
2MB of SRAM may be added to the on-board RAM (to raise the on-board total to 4MB).
1.3.1.1 CPU Board Connectors
The CPU Board contains twenty (20) connectors that function as follows (see Table 1-1):
Table 1-1 - CPU Board Connector Summary
Ref. # Pins Function Notes
J1 9-pin COM1 9-pin male D-sub see Figure 4-1 & Table 4-2
J2 9-pin COM2 9-pin male D-sub see Figure 4-1 & Table 4-2
J3 9-pin COM3 9-pin male D-sub see Figure 4-1 & Table 4-2
J4 9-pin COM4 9-pin male D-sub see Figure 4-1 & Table 4-2
J5 9-pin COM5 9-pin male D-sub see Figure 4-1 & Table 4-2
J9 70-pin Memory Expansion see Figure 4-2 & Table 4-3
J10 68-pin CPU/FMIOB Connector 1 see Figure 4-3 & Table 4-4
J11 68-pin CPU/FMIOB Connector 2 see Figure 4-3 & Table 4-4
J12 10-pin ISA PLD JTAG Header see Figure 4-4
J13 10-pin CPU JTAG Header see Figure 4-4
J14 10-pin Manufacturing Test (Power) see Figure 4-4
J15 14-pin Port 80 Diagnostics see Figure 4-5 & Table 4-5
J16 34-pin Floppy Disk Drive Header Not Used
J17 10-pin Manufacturing Test Not Used
J18 44-pin IDE HDD Header Not Used
J19 8-pin RJ-45 - 10base-T Ethernet Port See Figure 4-6 & Table 4-6
J21 31-pin Flat Panel Interface Not Used
J22 6-pin PS/2 Mouse Connector Not Used
J23 6-pin PS/2 Keyboard Connector Not Used
J24 10-pin Local Control PLD JTAG Header see Figure 4-4
CPU Bd. Communication Port Connectors J1 - J5
The CPU Board supports four external RS-232 serial ports (COM1, COM2, COM4 and
COM5) and one external RS-485/RS-232 serial port (COM3). COM1, COM2, COM4 and
COM5 utilize standard 9-pin male D-sub connectors and are PC/AT compatible ports.
COM3 also utilizes a PC/AT standard 9-pin male D-sub connector, and is jumper selectable
between RS-232 and RS-485 operation.
CPU Bd. Memory Expansion Connector J9
70-pin card slot J9 is provided for future memory expansion.