Technical data

Shelf Management Alarm Module
AXP 1410 Installation and Use (6806800H70D)
183
8.5.2 Redundancy Control
The ShMM-1500R supports redundant operation with automatic switchover using a redundant
ShMM-1500R. In a configuration where two ShMM-1500Rs are present, one acts as the active
shelf manager and the other as a standby. Both ShMM-1500Rs monitor each other, and either
can trigger a switchover if necessary.
The ShMM-1500R provides a number of hardware redundancy signals on the CN1 connector.
The HRI is implemented using the FPGA device.
8.5.2.1 Hardware Redundancy Interface
The hardware redundancy signals of the ShMM-1500R are implemented as follows:
z Cross connected ShMM-1500R present input (PRES_R#) and output (PRES_L#)
z Cross connected ShMM-1500R status 0 input (SHMM_STATUS0_R) and output
(SHMM_STATUS0_L)
z Cross connected redundant ShMM-1500R status 1 input (SHMM_STATUS1_R) and output
(SHMM_STATUS1_L)
z Active output (ACTIVE#) that can be used on the ShMM-1500R carrier to enable interfaces
that must be exclusively driven by the active ShMM-1500R
z Bi-color status LED
Note that the ACTIVE# signal is intended for use on a carrier and is not connected directly to the
peer-ShMM through the backplane. The cross-connected ShMM-1500R status signals are
asynchronous serial bit streams that are transmitted to the peer-ShMM by the FPGA and
communicate the following information: Health status, Switchover Requests, PRES_R state,
Active state, watchdog timer status, parity and other TBD data. An identical copy of the bit
stream is also sent on the redundant ShMM-1500R status signal. This information is used by the
FPGA to ensure that only one of the two connected ShMM-1500Rs goes into active mode at a
time. Figure 8-3 on page 184 shows the HRI of the ShMM-1500R.
As shown in the figure, the ShMM-1500R HRI incorporates a hot-swap buffer (IDT
QuickSwitch), which isolates the interface from the peer ShMM prior to FPGA configuration or
when the ShMM-1500R is powered down. The QuickSwitch device is guaranteed to be disabled
(open) when unpowered and does not have a low impedance path from any of the signal pins