- Emerson Remote Terminal Unit Instruction Manual

CI-ControlWave Express Introduction / 1-9
• TB1-4 - Ground (GND)
• TB1-5 - Auxiliary Power Out+: for an external radio/modem *
• TB1-6 - Ground (GND)
• TB2-1 - Secondary battery input
• TB2-2 - Ground (GND)
Note: * = Not available on units equipped with an Ethernet Port.
Power may be provided by a user supplied rechargeable 6/12V Lead Acid Battery (used in
conjunction with a Solar Panel), or a range of other user-supplied battery systems or bulk
(nominal +6Vdc, +12Vdc or +24Vdc) power supply.
Solar panels can be interfaced to rechargeable battery systems used to power a
ControlWave Express. Internally the solar panel wires connect to the rechargeable battery
via CPU/System Controller Board connector TB1-3 and TB1-4. A secondary power input
connection (TB2) is supported if no power is available through TB1.
Connector J2 (RJ-45) accommodates connection to one of three LCD Display configurations,
i.e., LCD Display only, LCD Display (with Dual-Button Keypad) or LCD Display (with 25-
Button Keypad). The LCD Display or LCD Display/Keypad is mounted on the Instrument
Front Cover.
1.3.2.2 CPU Memory
Boot/downloader FLASH
Boot/download code is contained in a single 512Kbytes uniform sector FLASH IC. This
device resides on the local bus, operates at 3.3V and is configured for 8-bit access. 4-
Position DIP-Switch SW1’s position 3 allows start-up menu options to be displayed or boot-
up from system FLASH. If SW1-3 is closed when a reset occurs, the boot-up code will cause
a recovery menu to be sent out the COM1 serial port to a terminal program running on an
external host computer. Note: Recovery Mode will also be initiated if CPU/System
Controller Board Switch SW1 positions 1 and 2 are both set ON or OFF when a reset occurs.
FLASH Memory
The base version of the CPU Module has 8Mbytes of 3.3V, simultaneous read/write (DL)
FLASH memory. FLASH memory is 16-bits wide. System Firmware and the Boot Project
are stored here. No hardware write protection is provided for the FLASH array.
System Memory (SRAM)
The base version of the CPU Module has 2Mbytes of soldered-down static RAM,
implemented with two 512K x 16 asynchronous SRAMs that are configured as a 1M x 16-bit
array. All random access memory retained data is stored in SRAM. During power loss
periods, SRAM is placed into data retention mode (powered by a backup 3.0V lithium
battery). SRAMs operate at 3.3V. Critical system information that must be retained during
power outages or when the system has been disabled for maintenance is stored here. Data
includes: Last states of all I/O, historical data, retain variables and pending alarm
messages not yet reported. The SRAM supports 16-bit accesses.
Click here to return to Table of Contents