Hardware manual

Flash Programming
18 © PHYTEC America LLC 2009 L-718e_2
5 Flash Programming
What you will learn with this example:
 how to use the IAR secondary bootloader for the LPC3250.
 downloading example user code to the external Flash memory
5.1 Secondary Bootloader
IAR provides a secondary bootloader for the NAND Flash. To better understand the reasons for the
need of a secondary bootloader on the LPC3250 a concise explanation of the boot process is
presented below.
After a reset the LPC3250 executes the on-chip bootstrap software located in the on-chip boot ROM.
This software is responsible for reading code out of NAND Flash and loading it in internal SRAM and
executing it. Because the SRAM is limited to 64kB on the LPC3250, it is not possible to execute code
which exceeds 64kB in size out of internal RAM. Further, despite the presence of 64kB iRAM in the
LPC3250, the bootstrap software will only copy 15.5kB from the NAND Flash into iRAM for execution.
To get around this limitation code must be executed from external SDRAM which is much greater in
size than internal SRAM. To execute code out of SDRAM three basic steps must be followed:
(1) the SDRAM interface must be initialized, and
(2) the code must be copied from NAND Flash into SDRAM, and
(3) execution must be transferred to SDRAM.
The LPC3250 bootstrap software is not capable of initialization SDRAM, copying code into it from
NAND Flash, and executing it. For this reason a secondary bootloader must be implemented on the
LPC3250. The secondary bootloader is the first code placed in NAND Flash which the LPC3250
bootstrap software will load into SRAM and execute. This secondary bootloader will then initialized
the SDRAM, copy application code from NAND Flash into SDRAM, and then transfer execution to
SDRAM.
For a more detailed description of the boot process, please refer to the phyCORE-LPC3250
Hardware Manual.
Note: Bad block skipping is supported by the secondary bootloader provided with this Rapid
Development Kit.