Specifications

PL 3120/PL 3150/ PL 3170 Power Line Smart Transceiver Data Book 81

Param Description Min Typ Max Units

Tck Clock cycle (user specified)

1.25

Tsc Select low to Clock transition 220

μs

Tdoc Data out to Clock (1st bit of invert mode) 440

Tcdo Clock to data out

45 ns

Tdis Data in setup 10

Tdih Data in hold 10

Tsdz Select high to data in high impedance

220 ns

Figure 3.39 SPI Slave Mode Timing

IO0

IO10

IO9

IO8

IO7

IO6

IO5

IO4

IO3

IO2

IO1

IO11

SPI Slave

Clock

Data Out

Data In

Select

Tcdo

Clock

(invert for

clockedge- or

invert=true)

Data Out

Data In

Select

Tdis

Tdih

Tsc

Tdoc

Tck