Specifications

Chapter 3 – Input/Output Interfaces

78 PL 3120/PL 3150/PL 3170 Power Line Smart Transceiver Data Boo

polarity (CPOL) to determine the behavior of the clock signal during SPI transmissions. These terms relate directly to

the clockedge and invert keywords used in this data book as follows:

CPHA

1 = clockedge(+)

0 = clockedge(-)

CPOL

1 = [default]

0 = invert

The active edge of the clock is determined by the clockedge and invert keywords. If the clock signal is idle at

logic 1 (default), then clockedge(-) indicates that the falling edge of the clock signal is active. If the invert

keyword is used, the rising edge of the clock signal would be active (see Figures 3.36 and 3.37).

Figure 3.36 Transmission Timing for Clockedge(-) (CPHA : 0)

Figure 3.37 Transmission Timing for Clockedge(+) (CPHA : 1)

[default] (CPOL = 1)

Present bit

Sample bit

Invert (CPOL = 0)

MISO

MOSI