Specifications

Chapter 3 – Input/Output Interfaces
62 PL 3120/PL 3150/PL 3170 Power Line Smart Transceiver Data Boo
k
At the start of all transfers, a right-justified 7-bit I
2
C address argument is sent out on the bus immediately after the I
2
C
“start condition.” For more information on this protocol, refer to Philips Semiconductor’s I
2
C documentation.
TIME
SCL
SDA
START OF
io_in() OR
io_out()
INPUT DATA
SAMPLED
SCL
SDA
TIME
END OF
io_in() OR
io_out()
BIT TRANSFER TIMING
START AND STOP TIMING
t
start
t
cla
t
f
t
stop
t
ret
t
dch
t
cld
t
chcl
t
chd
t
clch
t
dcl
IO11
IO10
IO9
IO8
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
Clock
Serial Data
Parameter Description Min Typ Max
t
f
I/O call to start condition
io_in()
io_out()
—
—
54.6 µs
43.4 µs
—
—
t
start
End of start condition
io_in()
io_out()
5.4 µs
5.4 µs
—
—
—
—
t
cla
End of start to start of address
io_in()
io_out()
24.0 µs
24.0 µs
—
—
—
—
t
cld
SCL low to data for io_out()
24.6 µs — —
t
dch
Data to SCL high for io_out()
7.2 µs — —
t
chcl
Clock high to clock low for io_out()
12.6 µs — —
t
chd
SCL high to data sampling for io_in()
13.2 µs — —
t
dcl
Data sample to SCL low for io_in()
7.2 µs — —
t
clch
Clock low to clock high for io_in()
24.0 µs — —
t
stop
Clock high to data
io_in()
io_out()
12.6 µs
12.6 µs
—
—
—
—
T
ret
SDA high to return from function
io_in()
io_out()
—
—
—
—
4.2 µs
4.2 µs
Figure 3.24 I
2
C I/O Object