Specifications

Chapter 2 – Hardware Resources
24 PL 3120/PL 3150/PL 3170 Power Line Smart Transceiver Data Boo
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Additional Functions
Reset Function
The reset function is a critical operation in any embedded microcontroller. In the case of the PL Smart Transceiver, the
reset function plays a key role in the following conditions:
• Initial V
DD5
power up (reset ensures proper initialization of the PL Smart Transceiver during power up).
• V
DD5
power down (reset ensures proper shut down of the PL Smart Transceiver).
• Fluctuations in the V
DD5
supply voltage (reset manages proper recovery of PL Smart Transceiver state after
V
DD5
stabilizes).
• Program recovery (if an application gets lost due to corruption of address or data the Smart Transceiver’s
watchdog timer initiates a watchdog reset event).
• Protecting the internal EEPROM of a PL 3120 or PL 3170 Smart Transceiver from corruption (an internal LVI
insures that the transceiver is held in reset when the V
DD5
supply is below a level that is safe for the EE activity).
The PL Smart Transceivers have four mechanisms to initiate a reset:
• RESET~ pin pulled low and then returned high.
• Software command either from the application program or from the network.
• Low-Voltage Indicator (LVI) detects a drop in the power supply below a set level.
• Watchdog timeout occurs during application execution (the timeout period is 840ms at 10MHz; this figure
scales inversely with clock frequency).
When in reset, the pins of the PL Smart Transceiver go to the states described in the list below. Figure 2.10 shows the
state of the pins during reset and the initialization sequence just after reset.
• Oscillator continues to run
• All processor functions stop
• SERVICE~ pin goes to high impedance (except for pull-up current source)
• I/O pins go to high impedance
• Address pins go to 0xFFFF (PL 3150 Smart Transceiver only)
• All data pins become outputs with low states (PL 3150 Smart Transceiver only)
• E~ clock goes high (PL 3150 Smart Transceiver only)
• R/W~ goes low (PL 3150 Smart Transceiver only)
When the RESET~ pin is released back to a high state, the PL Smart Transceiver begins its initialization procedure
starting at address 0x0001. The time it takes the PL Smart Transceiver to complete its initialization differs between PL
Smart Transceivers, the different firmware versions that are being run, and the memory space used by the application
(code and data). This will be discussed later in this section.