Specifications

Appendix D – Manufacturing Test and Handling Guidelines
242 PL 3120/PL 3150/PL 3170 Power Line Smart Transceiver Data Boo
k
Handling Precautions and Electrostatic Discharge
All CMOS devices have an insulated gate that is subject to voltage breakdown. The gate oxide for the PL Smart
Transceiver breaks down at a gate-source potential of about 10V. The high-impedance gates on the PL Smart
Transceiver are protected by on-chip networks. However, these on-chip networks do not make the IC immune to ESD.
Laboratory tests show that devices can fail after one very high voltage discharge. They can also fail due to the
cumulative effect of several lower potential discharges.
Static-damaged devices behave in various ways, depending on the severity of the damage. The most severely damaged
are the easiest to detect because the input or output has been completely destroyed and is shorted to V
DD5
, shorted to
GND, or is open-circuit. As a result of this, the device will no longer function. Less severe cases are more difficult
to detect because they can cause intermittent failures or degraded performance. Static damage often increases
leakage currents.
All CMOS devices are susceptible to large static voltage discharges that can be generated while handling. Static voltages
generated by a person walking across a waxed floor, for example, have been measured in the range of 4kV – 15kV
(depending on humidity, surface conditions, etc.). Therefore the following general precautions should be followed when
handling CMOS devices such as the PL Smart Transceiver.
• Do not exceed the maximum ratings specified in the data sheet.
• All unused digital device input pins should be connected to V
DD5
or GND.
• All low-impedance equipment (pulse generators, etc.) should be connected to CMOS inputs only after the
device is powered up. Similarly, this type of equipment should be disconnected before power is turned off.
• A circuit board containing CMOS devices is merely an extension of the device and the same handling pre-
cautions apply to that board. Contacting connectors wired directly to devices can cause damage. Plastic
wrapping should be avoided. When external connections to a PC board address pins of CMOS integrated
circuits, a resistor should be used in series with the inputs or outputs. The limiting factor for the value of the
series resistor is the added delay caused by the time constant formed by the series resistor and input
capacitance. This resistor will help limit accidental damage if the PC board is removed and is brought into
contact with static-generating materials.
• All CMOS devices should be stored or transported in materials that are antistatic. Devices must not be inserted
into conventional plastic “snow,” Styrofoam
®
, or plastic trays. Devices should be left in their original container
until ready for use.
• All CMOS devices should be placed on a grounded bench surface and operators should ground themselves
prior to handling devices, because a worker can be statically charged with respect to the bench surface. Wrist
straps in contact with skin are strongly recommended. See Figure D.3.
• Nylon or other static-generating materials should not come in contact with CMOS circuits.
• If automatic handling equipment is being used, high levels of static electricity can be generated by the
movement of devices, belts, or boards. Reduce static build-up by using ionized air blowers or room
humidifiers. All parts of machines which come into contact with the top, bottom, and sides of IC packages must
be grounded metal or other conductive material.
• Cold chambers using CO
2
for cooling should be equipped with baffles, and devices must be contained on or
in conductive material, or soldered onto a PCB.
• When lead-straightening or hand-soldering is necessary, provide ground straps for the apparatus used and be
sure that soldering ties are grounded.