Specifications

PL 3120/PL 3150/ PL 3170 Power Line Smart Transceiver Data Book 95
Frequency Output
A timer/counter can be configured to generate a continuous square wave of 50% duty cycle. Writing a new frequency
value to the device takes effect at the end of the current cycle. This object is useful for frequency synthesis to drive an
audio transducer, or to drive a frequency to voltage converter to generate an analog output (see Figure 3.50).
.
System Clock
Divide Chain
Timer/Counter 1
Timer/Counter 2
IO10
IO9
IO8
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
High Current Sink Drivers
IO11
Frequency Resolution and
Maximum Range at 10MHz
END
OF io_out()
t
ret
NEW OUTPUT
APPEARS ON PIN
HARDWARE
UPDATED
INTERNALLY
t
fout
START
OF io_out()
TIME
FREQUENCY
OUTPUT
ONE CYCLE
CLK Resolution Range Unit
0
1
2
3
4
5
6
7
0.4
0.8
1.6
3.2
6.4
12.8
25.6
51.2
26.21
52.42
104.86
209.71
419.42
838.85
1677
3355
µs
µs
µs
µs
µs
µs
µs
µs
Symbol Description Typ @ 10MHz
t
fout
Function call to output update 96 µs
t
ret
Return from function 13 µs
Figure 3.50 Frequency Output Latency Values
A new frequency output value will not take effect until the end of the current cycle. There are two exceptions to this
rule. If the output is disabled, the new (non-zero) output will start immediately after
t
fout
. Also, for a new output value of
zero, the output is disabled immediately and not at the end of the current cycle.
A disabled output is a logic zero by default unless the invert keyword is used in the I/O object declaration. The
resolution and range for this object scale with PL Smart Transceiver input clock rate.