Datasheet

M2Y51H64TU88D0B / M2Y51H64TU88D6B / M2Y1GH64TU8HD0B / M2Y1GH64TU8HD6B
512MB: 64M x 64 / 1GB: 128M x 64
Unbuffered DDR2 SDRAM DIMM Preliminary Edition
REV 0.1 15
08/2008
© NANYA TECHNOLOGY CORP.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
AC Timing Specifications for DDR2 SDRAM Devices Used on Module
(T
CASE
= 0 °C ~ 85 °C; V
DDQ
= 1.8V ± 0.1V; V
DD
= 1.8V ± 0.1V, See AC Characteristics) (Part 2 of 2)
Symbol
Parameter
PC2-5300
PC2-6400
Unit
Min.
Max.
Min.
Max.
tWR
Write recovery time without Auto-Precharge
15
-
15
-
ns
WR
Write recovery time with Auto-Precharge
tWR/tCK
-
tWR/tCK
-
tCK
tDAL
Auto precharge write recovery + precharge time
WR+tRP
-
WR+tRP
-
tCK
tWTR
Internal write to read command delay
7.5
-
7.5
ns
tRTP
Internal read to precharge command delay
7.5
7.5
ns
tXSNR
Exit self refresh to a Non-read command
tRFC+10
tRFC+10
ns
tXSRD
Exit self refresh to a Read command
200
200
tCK
tXP
Exit precharge power down to any Non- read
command
2
-
2
-
tCK
tXARD
Exit active power down to read command
2
-
2
-
tCK
tXARDS
Exit active power down to read command
7-AL
8-AL
tCK
tCKE
CKE minimum pulse width
3
3
tCK
tAOND
ODT turn-on delay
2
2
2
2
tCK
tAON
ODT turn-on
tAC (min)
tAC (max)
+0.7
tAC (min)
tAC (max)
+0.7
ns
tAONPD
ODT turn-on (Power down mode)
tAC (min)
+2
2tCK +
tAC(max)
+1
tAC (min)
+2
2tCK +
tAC(max)
+1
ns
tAOFD
ODT turn-off delay
2.5
2.5
2.5
2.5
tCK
tAOF
ODT turn-off
tAC(min)
tAC(max)
+0.6
tAC(min)
tAC(max)
+0.6
ns
tAOFPD
ODT turn-off (Power down mode)
tAC
(min)+2
2.5tCK +
tAC(max)
+1
tAC
(min)+2
2.5tCK +
tAC(max)
+1
ns
tANPD
ODT to power down entry latency
3
3
tCK
tAXPD
ODT power down exit latency
8
8
tCK
Speed Grade Definition
Symbol
Parameter
PC2-5300
PC2-6400
Unit
Min
Max
Min
Max
tRAS
Row Active Time
45
70,000
45
70,000
ns
tRC
Row Cycle Time
60
-
57.5
-
ns
tRCD
RAS to CAS delay
15
-
12.5
-
ns
tRP
Row Precharge Time
15
-
12.5
-
ns