Datasheet

M2F(X)4G64CB88B7(H)N / M2F(X)8G64CB8HB5(9)N
4GB: 512M x 64 / 8GB: 1024M x 64
PC3-10600 / PC3-12800
Unbuffered DDR3 SDRAM DIMM
REV 1.0 2
07/2012
© NANYA TECHNOLOGY CORPORATION
NANYA reserves the right to change products and specifications without notice.
Ordering Information
Part Number
Speed
Organization
Power
Leads
Note
M2F4G64CB88B7N-CG
DDR3-1333
PC3-10600
667MHz (1.5ns @ CL = 9)
512Mx64
1.5V
Gold
Without H/S
M2F8G64CB8HB5N-CG
DDR3-1333
PC3-10600
667MHz (1.5ns @ CL = 9)
1024Mx64
M2X4G64CB88B7N-DG
DDR3-1600
PC3-12800
800MHz (1.25ns @ CL = 9)
512Mx64
M2F4G64CB88B7N-DI
DDR3-1600
PC3-12800
800MHz (1.25ns @ CL = 11)
512Mx64
M2X8G64CB8HB5N-DG
DDR3-1600
PC3-12800
800MHz (1.25ns @ CL = 9)
1024Mx64
M2F8G64CB8HB5N-DI
DDR3-1600
PC3-12800
800MHz (1.25ns @ CL = 11)
1024Mx64
M2X4G64CB88BHN-DG
DDR3-1600
PC3-12800
800MHz (1.25ns @ CL = 9)
512Mx64
Heat Sink
M2F4G64CB88BHN-DI
DDR3-1600
PC3-12800
800MHz (1.25ns @ CL = 11)
512Mx64
M2X8G64CB8HB9N-DG
DDR3-1600
PC3-12800
800MHz (1.25ns @ CL = 9)
1024Mx64
M2F8G64CB8HB9N-DI
DDR3-1600
PC3-12800
800MHz (1.25ns @ CL = 11)
1024Mx64
Pin Description
Pin Name
Description
Pin Name
Description
CK0, CK1
Clock Inputs, positive line
DQ0-DQ63
Data input/output
, 
Clock Inputs, negative line
DQS0-DQS8
Data strobes
CKE0, CKE1
Clock Enable
-
Data strobes complement

Row Address Strobe
DM0-DM8
Data Masks

Column Address Strobe

Temperature event pin

Write Enable

Reset pin
, 
Chip Selects
V
REFDQ
, V
REFCA
Input/Output Reference
A0-A9, A11, A13-A15
Address Inputs
V
DDSPD
SPD and Temp sensor power
A10/AP
Address Input/Auto-Precharge
SA0, SA1
Serial Presence Detect Address Inputs
A12/
Address Input/Burst Chop
Vtt
Termination voltage
BA0-BA2
SDRAM Bank Address Inputs
V
SS
Ground
ODT0, ODT1
Active termination control lines
V
DD
Core and I/O power
SCL
Serial Presence Detect Clock Input
NC
No Connect
SDA
Serial Presence Detect Data input/output