User's Manual Part 1



 

This section provides details on the various interfaces available M.2 modules.
There are two interfaces on the M.2 host interface that support interprocessor communications
(ICP); however, for the WWAN M.2 modules covered by the Product Description only the
USB 2.0 High-speed port will be supported.
The other ICP interface, USB Super-speed Inter-Chip (USB_SSIC), is not supported and the
signals should not be connected at the host.
The host processor, connected via an ICP interface, has access to the functions of the WWAN
card.

The USB 2.0 High-speed interface supports the following device classes: CDC-MBIM, CDC-
ACM, and CDC-NCM.
The USB Controller is compliant to the USB 2.0 Specification and with the Link Power
Management (LPM) Addendum. LPM introduces a new sleep state (L1) which significantly
reduces the transitional latencies between the defined power states; hence, improving the
responsiveness of the WWAN platform regarding connecting to the internet (Quick Connect).
USB2.0 LPM L1 Support
Support for OS assisted fast dormancy
Selective Suspend support
Very low power when in Selective Suspend:
<4mw when connected to network (wake)
<1 mW no wake
It supports High-speed (HS, 480 MBit/s); Full-speed (FS, 12 MBit/s) transfers. Low- speed
mode is not supported. Because there is not a separate USB-controlled voltage bus, USB
functions implemented on the M.2 module are expected to report as self-powered devices
General Features
In device mode : High-speed (480 MBit/s) and Full-speed (12 MBit/s)
In host mode: High-speed (480 MBit/s), Full-speed (12 MBit/s). Low-speed mode
(1.5
Mbit/s) is not supported.
Support for 16 bidirectional end points and channels including the end point 0.