Data Sheet

© Copyright 2012 WIZnet Co., Inc. All rights reserved.
79
iEthernet W5200
7.4.3 SPI Timing
Figure 24 SPI Timing
nSCS
SCLK
MOSI
MISO
T
WH
T
WL
HI-Z
HI-Z
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
T
DS
T
DH
T
DH
T
CHZ
T
OV
T
CSS
T
CS
T
CSH
Symbol Description Min Max Units
F
SCK
SCK Clock Frequency 80 MHz
T
WH
SCK High Time 6 ns
T
WL
SCK Low Time 6 ns
T
CS
nSCS High Time 5 ns
T
CSS
nSCS Hold Time 5 - ns
T
CSH
nSCS Hold Time 5 ns
T
DS
Data In Setup Time 3 ns
T
DH
Data In Hold Time 3 ns
T
OV
Output Valid Time 5 ns
T
OH
Output Hold Time 0 ns
T
CHZ
nSCS High to Output Hi-Z 5 ns