Datasheet

a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9341
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Page 197 of 239
8.4.3 Driver timing control A (E8h)
F6h Driver timing control A
D/CX RDX WRX D17-8
D7 D6 D5 D4 D3 D2 D1 D0
HEX
Command 0 1 ↑ XX
1 1 1 0 1 0 0 0
E8h
1
st
Parameter 1 1 ↑ XX
1 0 0 0 0 1 0 NOW
84
2
nd
Parameter 1 1 ↑ XX
0 0 0 EQ 0 0 0 CR
11
3
rd
Parameter 1 1 ↑ XX
0 1 1 1 1 0 PC[1:0]
7A
Description
1
st
parameter:gate driver non-overlap timing control
0:default non-overlap time
1:default + 1unit
2
nd
parameter:EQ timing control
0: default – 1unit
1:default EQ timing
parameter:CR timing control
0: default – 1unit
1:default CR timing
3
rd
parameter:pre-charge timing control
11: reserved
10: default pre-charge timing
01:default – 1unit
00:default – 2unit
Restriction EXTC should be high to enable this command
Register
Availability
Status Availability
Normal Mode ON, Idle Mode OFF, Sleep OUT Yes
Normal Mode ON, Idle Mode ON, Sleep OUT Yes
Partial Mode ON, Idle Mode OFF, Sleep OUT Yes
Partial Mode ON, Idle Mode ON, Sleep OUT Yes
Sleep IN Yes
Default
Default Value
Status
Parameter1 Parameter2
Parameter3
Power ON
Sequence
84 11
7A
SW Reset 84 11
7A
HW Reset 84 11
7A