Service Manual
MM-E 2072-09333-00
~WR/P0.7
~RD/P0.6
ALE/P0.5
P0.4
P0.3
P0.2
P0.1
~WR/P4.7
~RD/P4.6
ALE/P4.5
P4.4
P4.3
P4.2
P4.1
A14/P5.6
A13/P5.5
A12/P5.4
A11/P5.3
A10/P5.2
A9/P5.1
A15M/A7/P6.7
A14M/A6/P6.6
A13M/A5/P6.5
A12M/A4/P6.4
A11M/A3/P6.3
A10M/A2/P6.2
A9M/A1/P6.1
AD6/D6/P7.6
AD5/D5/P7.5
AD4/D4/P7.4
AD3/D3/P7.3
AD2/D2/P7.2
AD1/D1/P7.1
AD6/D6/P3.6
AD5/D5/P3.5
AD4/D4/P3.4
AD3/D3/P3.3
AD2/D2/P3.2
AD1/D1/P3.1
A14M/A6/P2.6
A13M/A5/P2.5
A12M/A4/P2.4
A11M/A3/P2.3
A10M/A2/P2.2
A9M/A1/P2.1
AIN2.6/A14/P1.6
AIN2.5/A13/P1.5
AIN2.4/A12/P1.4
AIN2.3/A11/P1.3
AIN2.2/A10/P1.2
AIN0.6
AIN0.5
AIN0.4
AIN0.3
AIN0.2
AIN0.1
AIN0.0
AIN0.7
AIN2.7/A15/P1.7
A8M/A0/P2.0
AD0/D0/P3.0
AD7/D7/P3.7
AD0/D0/P7.0
A8M/A0/P6.0
A8/P5.0
A15/P5.7
AD7/D7/P7.7
DAC0
DAC1
AIN2.1/A9/P1.1
AIN2.0/A8/P1.0
P0.0
A15M/A7/P2.7
TMS
TDI
TDO
RST
TCK
CP1+
CP1-
CP0-
CP0+
XTAL1
XTAL2
MONEN
DGND1
AGND1
AGND2
P4.0
VDD2
VDD1
VDD3
AV+1
AV+2
VREF
VREF0
VREF2
DGND2
DGND3
VREFD
T
ACTIVE HIGH
ACTIVE HIGH
GND
TCK
3V3
TDO
TMS
CPU_JTAG
TDI
ACTIVE HIGH
ACTIVE HIGH
REMAINS FROM INT0_N
ACTIVE HIGH = F(T,LED_ON)
RESET_CPU
ACTIVE HIGH
ACTIVE HIGH
ACTIVE LOW
ACTIVE LOW
1
E8
SH_DN_232_N
TAD_CODAN_MODE
SH_DN_232_N
TAD_CODAN_MODE
ON_OFF_SW
10KR100
R25
12.1K
3V3_CPU_AN
RT1
232261513103
100N
C555C554
100N
100N
C545
3V3_CPU
3V3_CPU_AN
TX_UART0_TTL
100N
C24C23
100N
55
56
57
58
59
60
61
91
92
93
94
95
96
97
82
83
84
85
86
87
73
74
75
76
77
78
79
66
67
68
69
70
71
48
49
50
51
52
53
40
41
42
43
44
45
30
31
32
33
34
24
23
22
21
20
19
18
25
29
46
54
47
72
80
88
81
65
100
99
35
36
62
39
1
3
4
5
2
7
6
8
9
26
27
28
38
10
13
98
64
37
90
11
14
12
16
17
63
89
15
U1
C8051F126-GQ
1
E3
TERMISTOR
TERM_M
50V
4.7U
C15
C16
4.7U
50V
C551
4.7U
50V
50V
4.7U
C27
100N
C22
C14
10U
25V
25V
10U
C552
3V3
3V3
E502
BLM18PG600SN1
R531 0.0
0.0625
3V3_CPU
3V3_CPU_AN
R584
0.0
100N
C25
1
E4
V0_LCD
XCS_N_SDF
R37 1M
BLM18PG600SN1
E26
RX_UART0_TTL
RX_UART1_TTL
100N
C32
A0_CPU
MOSI_CPU
XCS_N_LCD
RST_N_LCD
RD_N_CPU
WR_N_CPU
R105 10K
R36 22.1
22.1R91
R506 22.1
LAB
CPU_D6
CPU_D5
CPU_D4
CPU_D3
CPU_D2
CPU_D1
CPU_D0
CPU_D[7:0]
CPU_D7
C46
100N
16V
R92 22.1
1
TP501
R21 22.1
22.1R22
22.1R23
R46 22.1
22.1R45
R44 22.1
R43 22.1
22.1R42
1
E14
1
E15
1
E16
1
E17
22.1R40
R41 22.1
22.1R38
R39 22.1
C47
1U
10V
1
E7
R71 22.1
22.1R72
ON_OFF_SW
POW_OFF_CPU
PTT_MIC_P_CPU
PTT_MIC_N
VLED_HEAT_EN
KB_BL_EN
RX_UART0_TTL
SCL_CPU
R80 22.1
LCD_HEAT_LEVEL
LCD_BL_LEVEL
LCD_BL_EN
R19 22.1
RX_UART1_TTL
TX_UART1_TTL
0.0R82
R83 0.0
0.0R84
R85 0.0
0.0R86
R81 0.0
10KR121
9
8
7
6
5
4
3
2
10
1
TSW-105-23-S-D
P5
1
E2
1
E1
1
E9
1
E5
R49 22.1
R18
100K
R17
1K
1
2
P7
TSW-102-23-S-S
R212 221K
C121
100N
1
E25
1
E24
KEY_X0
KEY_X1
KEY_X4
KEY_X[4:0]
KEY_Y0
KEY_Y[4:0]
22.1R63
R120 10K
10KR119
10KR98
R99 10K
R93 10K
22.1R223
R222 22.1
22.1R54
R115 22.1
Y1
7.3728MHZ
33P
C19
MISO_CPU
22.1R26
1
E21
1
E22
22.1R65
R87
10K
R107 10K
10KR106
22.1R116
R114 22.1
22.1R117
TCK_CPU
3V3_CPU
R62 22.1
R51 22.1
100N
C26
C20
33P
22.1R33
R32 22.1
R31 22.1
22.1R30
22.1R29
R28 22.1
R27 22.1
3V3_CPU
R47 22.1
22.1R48
22.1R50
22.1R52
R53 22.1
22.1R61
R60 22.1
R59 22.1
R58 22.1
22.1R57
22.1R56
22.1R55
R70 22.1
R69 22.1
R68 22.1
22.1R67
22.1R66
R64 22.1
R74 22.1
R73 22.1
R76 22.1
R75 22.1
R78 22.1
R77 22.1
R79 22.1
3V3_CPU
10KR108
3V3_CPU
R109 10K
10KR110
1
E23
TDO_CPU
3V3_CPU
TMS_CPU
TDI_CPU
3V3_CPU
10KR94
R95 10K
10KR96
R97 10K
R118 10K
10KR113
R112 10K
10KR111
R104 10K
10KR103
R102 10K
10KR101
22.1R20
R24 22.1
22.1R34
R35 22.1
22.1R88
R89 22.1
22.1R90
KEY_Y3
KEY_Y2
KEY_Y1
KEY_X3
KEY_X2
C45
100N
1
E10
1
E11
3V3_CPU
1
E32
1
E36
1
E35
1
E33
PTT_MIC_P_CPU
XCS_N_SDF
XIL_MONITOR3V3
SDF_SW_DET
TX_UART1_TTL
KEY_X[4:0]
KEY_Y[4:0]
CPU_D[7:0]
WR_N_CPU
RST_N_LCD
XCS_N_LCD
RD_N_CPU
SCL_CPU
MOSI_CPU
V0_LCD
MISO_CPU
XIL_MONITOR
LCD_HEAT_LEVEL
LCD_BL_LEVEL
LCD_BL_EN
KB_BL_EN
SDF_SW_DET
VLED_HEAT_EN
LCD_HEAT_EN
KEY_Y4
C553
100N
TX_UART0_TTL
LCD_HEAT_EN
A0_CPU
1N
C550
0.0625
0.0R532
C544
4.7U
50V
TCK_CPU
TDO_CPU
TDI_CPU
TMS_CPU
MR_N
V0_LCD_DIV
3V3_CPU_AN
POW_OFF_CPU
Figure A-3.B. CONTROL HEAD Module, Schematic Circuit Diagram (Sheet 2 of 6 – Microcontroller)
A-53/A-54