User`s guide

Elan Digital Systems Ltd. 38 AD125 USER’S GUIDE
4.10 DECW (IR E)
BIT FUNCTION
RESET
STATE
WRITE READ
0 X X -
1 X X -
2 X X -
3 X X -
4 X X -
5 X X -
6 X X -
7 X X -
ANY READ OR WRITE ACCESS TO THIS PORT WILL DECREMENT
THE WRITE POINTER BY TWO.
4.11 CLRCT (IR F)
BIT FUNCTION
RESET
STATE
WRITE READ
0 X X -
1 X X -
2 X X -
3 X X -
4 X X -
5 X X -
6 X X -
7 X X -
ANY READ OR WRITE ACCESS TO THIS PORT WILL SET THE
READ & WRITE POINTERS TO 0x7FFF AND WILL PRE_LOAD THE
MUX COUNTER WITH THE MUXSEQ START ADDRESS. NB:
CLEARING THE COUNTERS IN FIFO MODE MAY CAUSE AN
ARTIFICIAL IREQ EVENT. USE THE SELCTRD BIT TO CLEAR THE
IREQ FLIP-FLOP AFTER CLEARING THE COUNTERS.