User`s manual

Software Manual • EKF Intelligent I/O Controller Family On CompactPCI
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Address Translation Unit
The i960 Rx processor contains two Address Translation Units, a primary and a secondary
ATU. The primary ATU builds the data path between the
CompactPCI
bus and the local data
bus, i.e. the local memory. The secondary ATU is not used on any member of EKF’s
Intelligent I/O Controller family, thus the focus is set on the primary ATU only, that simply is
called ATU in the following.
From the host’s view the ATU is seen as PCI function 1. As every PCI device the ATU
implements its own configuration space. This space is 256 bytes in size, whereas the first
64 bytes must adhere to a predefined header format. The ATU is programmed on the
CompactPCI
interface via type 0 configuration commands to PCI function 1.
The following table shows the configuration header according the
PCI Local Bus
Specification
, revision 2.1:
Address Translation Unit Configuration Header Address Offset
ATU Device ID ATU Vendor ID 0x00
ATU Primary Status ATU Primary Command 0x04
ATU Base Class ATU Sub Class ATU Prog IF ATU Revision ID 0x08
BIST Header Type Latency Timer Cacheline Size 0x0C
Primary Inbound ATU Base Address PIABAR 0x10
Reserved
0x14
0x18
0x1C
0x20
0x24
0x28
ATU Subsystem ID ATU Subsystem Vendor ID 0x2C
Expansion ROM Base Address 0x30
Reserved
0x34
0x38
Max. Latency Minimum Grant Interrupt Pin Interrupt Line
0x3C
The next table shows the i960
®
RP specific registers of the ATU configuration space.