User's Manual

16
z RGMII/MII interface
Pin Name I/O Description
22 HOST I MII/PCI Select. 1: RGMII/MII (Pull High) 0: PCI (Pull
Low)
43 MDC O PHY Management Clock
93 GE_RXDV I RGMII/MII RX Data Valid
103 GE_RXD1 I RGMII/MII RX Data bit #1
105 GE_RXD2 I RGMII/MII RX Data bit #2
106 GE_RXD0 I RGMII/MII RX Data bit #0
107 GE_RXD3 I RGMII/MII RX Data bit #3
108 GE_RXCLK I/O RGMII/MII RX Clock
109 GE_TXEN O RGMII/MII TX Data Enable
110 GE_TXCLK I/O RGMII/MII TX Clock
111 GE_TXD3 O RGMII/MII TX Data bit #3
112 GE_TXD0 O RGMII/MII TX Data bit #0
115 GE_TXD1 O RGMII/MII TX Data bit #1
116 GE_TXD2 O RGMII/MII TX Data bit #2
121 MDIO I/O PHY Management Data (RGMII/MII Select. 1: RGMII
(Pull High) 0:MII (Pull Low))