Datasheet
Datasheet
Transceiver
y2
Pin Descriptions
Pin Logic Symbol Description Note
43 CML-I Tx8n Transmitter Inverted Data Input
44 CML-I Tx8p Transmitter Non-Inverted Data Input
45 GND Ground 1
46 Reserved For future use 3
47 VS1 Module Vendor Specific
13
48 VccRx1 3.3 V Power Supply2
49 VS2 Module Vendor Specific 23
50 VS3 Module Vendor Specific 33
51 GND Ground 1
52 CML-O Rx7p Receiver Non-Inverted Data Output
53 CML-O Rx7n Receiver Inverted Data Output
54 GND Ground 1
55 CML-O Rx5p Receiver Non-Inverted Data Output
56 CML-O Rx5n Receiver Inverted Data Output
57 GND Ground 1
58 GND Ground 1
59 CML-O Rx6n Receiver Inverted Data Output
60 CML-O Rx6p Receiver Non-Inverted Data Output
61 GND Ground 1
62 CML-O Rx8n Receiver Inverted Data Output
63 CML-O Rx8p Receiver Non-Inverted Data Output
64 GND Ground 1
65 NC No Connect 3
66 Reserved For future use 3
67 VccTx1 3.3 V Power Suppl
y2
68 Vcc2 3.3 V Power Supply2
69 Reserved For Future Use 3
70 GND Ground 1
71 CML-I Tx7p Transmitter Non-Inverted Data Input
72 CML-I Tx7n Transmitter Inverted Data Input
73 GND Ground 1
74 CML-I Tx5p Transmitter Non-Inverted Data Input
75 CML-I Tx5n Transmitter Inverted Data Input
76 GND Ground 1
*Note 1:
QSFP-DD uses common ground (GND) for all signals and supply (power). All are common within the QSFP-DD module and all module
voltages are referenced to this potential unless otherwise noted.
*Note 2: VccRx, VccRx1, Vcc1, Vcc2, VccTx and VccTx1 shall be applied concurrently. VccRx, VccRx1, Vcc1, Vcc2, VccTx and VccTx1 may be internally
connected within the module in any combination.
The connector Vcc pins are each rated for a maximum current of 1000 mA.
*Note 3: All Vendor Specific, Reserved and No Connect pins may be terminated with 50 ohms to ground on
the host. Pad 65 (No Connect) shall be leſt unconnected within the module. Vendor specific and Reserved pads shall have an impedance to
GND that is greater than 10 k Ohms and less than 100 pF.