ECS4660-28F_Management Guide-R03

C HAPTER 24 | System Management Commands
Precision Time Protocol
– 977 –
Boundary Clock :
Port State : Master
Log Min Delay Req. Interval : 0
Peer Mean Path Delay : 0 sec. 0 nano sec.
Announce Receipt Timeout : 3
Log Announce Interval : 1
Log Sync Interval : 0
Delay Mechanism : Peer to Peer
Log Min Pdelay Req. Interval : 0
Version Number : 2
.
.
.
Table 83: show ptp information - display description for boundary clock
Field Description
Default Data Set
Two Step Flag Shows if this device is a two-step clock. A two-step clock
sends a time stamp in a Follow_Up message, while a one-
step clock sends a time stamp in a Sync message.
Clock Identity A unique 8-octet array based on the IEEE EUI-64
assigned numbers
Number Ports Number of PTP ports on this device
Clock Quality A set of attributes defining the clock’s relative quality
Clock Class An attribute defining the clock’s International Atomic
Time (TAI) traceability.
Clock Accuracy An attribute defining the accuracy of the clock
Offset Scaled Log Variance An attribute defining the stability of the clock
Priority1 A preference level used in selecting the master clock
Priority2 A secondary preference level used in selecting the master
clock
Domain Number PTP clock synchronization domain
Slave Only Shows if this device is operating in slave-only mode.
(This operation mode is not supported by this device.)
Current Data Set
Steps Removed Number of steps (clock hops) from the grand master
Offset From Master Time offset from the grand master
Mean Path Delay Mean path delay from the grand master
Parent Data Set
Parent Identity Parent identity information
Clock Identity A unique 8-octet array based on the IEEE EUI-64
assigned numbers
Port Number Port connected to the parent clock. (This attribute
indicates a number from the sequence of ports
supporting PTP, not a physical port number.)
Observed Offset Scaled Log
Variance
The variance of the parent’s clock phase as measured by
the local clock
Observed Clock Phase Change
Rate
The variance of the parent’s clock phase change rate as
measured by the slave clock