Datasheet

7P
50
92
50
50
50
W2
Hardware Connector Pin Definition
PIN Logic Symbol Name/Description Plug Sequence Note
1 GND Module Ground 11
2 Reserved No connect in the module3
3 Reserved No connect in the module3
4 GND Module ground 1
5 Reserved No connect in the modul
e3
6 Reserved No connect in the module3
7 GND Module ground 1
8LVTTL-I ModSelL Module select 3
9LVTTL-I ResetL Module reset, internal pullup 10kΩ 3
10 VCC3 +3.3 V power suppl
y2
11 OC-I SCL I2C serial interface clock 33
12 OC-I/O SDA I2C serial interface data line33
13 GND Module ground 1
14 Reserved No connect in the modul
e3
15 Reserved No connect in the module3
16 GND Module ground 1
17 Reserved No connect in the modul
e3
18 Reserved No connect in the module3
19 GND Module ground 1
20 GND Module ground 1
21 Reserved No connect in the modul
e3
22 Reserved No connect in the module3
23 GND Module ground 1
24 Reserved No connect in the modul
e3
25 Reserved No connect in the module3
26 GND Module ground 1
27 LV TTL-O ModPrsL Module present internal connect to GND 3
28 LV TTL-OIntL/INLOSInterrupt. optionally configurable as INLOS, EDFA loss of input signal 3
29 VCC3 +3.3 V power suppl
y2
30 VCC3 +3.3 V power supply2
31 LV TTL-I LPMode/Tx Dis
Low power mode. Optionally configurable as TxDis via the management
interface (SFF-8636)
3
32 GND Module ground 1
33 Reserved 3
34 Reserved 3
35 GND Module ground 1
36 Reserved 3
37 Reserved 3
38 GND Module ground 1
Datasheet Packet-Optical EDFA