Datasheet

15
Installing the Motherboard
Table A: Unbuffered DIMM Support for 754-pin
Maximum DRAM Speed
Number of
DIMMs
5
DIMM 1
4.1.5
DIMM2
2
1T 2T
3
1
Single rank Empty DDR400 DDR400
1
Empty Single rank DDR400 DDR400
1
Double rank Empty DDR400 DDR400
1
Empty Double rank DDR400 DDR400
2
Single rank Single rank DDR400 DDR400
2
Single rank Double rank DDR400 DDR400
2
Single rank Empty DDR400 DDR400
2
Double rank Single rank DDR400 DDR400
2
Double rank Double rank DDR333 DDR333
2
Double rank Empty DDR400 DDR400
2
Double rank Empty DDR333 DDR333
2
Empty Single rank DDR333 DDR400
2
Empty Single rank DDR200 DDR400
2
Empty Double rank DDR200 DDR400
2
Empty Double rank DDR200 DDR333
1. DIMM 1 connects to command/address pins MEMADDA [13:0], MEMBANKA [1:0],
MEMRASA_L, MEMCASA_L, MEMWEA_L, MEMCKEA.
2. DIMM 2 connect to command/address pins MEMADDB [13:0], MEMBANKB
[1:0], MEMRASB_L, MEMCASB_L, MEMWEB_L, MEMCKEB.
3. 2T timing is supported in CG and later silicon revisions. Refer to the AMD Athlon
™
64 Processor Power and Thermal Data Sheet, order #30430, for silicon revision determination.
3. The maximum allowable DRAM speed under these high load conditions may be reduced
with certain DIMMs due to signal integrity degradation.