Specifications

February 2015 IS29GL_128S_01GS_00_Rev.A GL-S MirrorBit
®
Family 81
Data Sheet
Note:
1. Not 100% tested.
Note:
1. Not 100% tested.
Table 10.5 Read Operation V
IO
= V
CC
= 2.7V to 3.6V (-40°C to +105°C)
Parameter
Description Test Setup
Speed Option
Unit
JEDEC Std 100 110 120
t
AVAV
t
RC
Read Cycle Time (Note 1)
128 Mb, 256 Mb
Min
100 110
ns
512 Mb, 1 Gb 110 120
t
AVQV
t
ACC
Address to Output Delay
CE# = V
IL
OE# = V
IL
128 Mb, 256 Mb
Max
100 110
ns
512 Mb, 1 Gb 110 120
t
ELQV
t
CE
Chip Enable to Output
Delay
OE# = V
IL
128 Mb, 256 Mb
Max
100 110
ns
512 Mb, 1 Gb 110 120
t
PAC C
Page Access Time
128 Mb, 256 Mb
Max
15 20
ns
512 Mb, 1 Gb 15 20
t
GLQV
t
OE
Output Enable to Output Delay Max 25 ns
t
AXQX
t
OH
Output Hold time from addresses, CE# or
OE#, Whichever Occurs First
Min 0 ns
t
EHQZ
t
DF
Chip Enable or Output Enable to Output
High-Z (Note 1)
Max 15 ns
t
OEH
Output Enable Hold Time
(Note 1)
Read Min 0 ns
Toggle and
Data# Polling
Min 10 ns
t
ASSB
Automatic Sleep to Standby time (Note 1)
CE# = V
IL
, Address
stable
Typ 5 µs
Max 8 µs
Table 10.6 Read Operation V
IO
= 1.65V to V
CC
, V
CC
= 2.7V to 3.6V (-40°C to +105°C)
Parameter
Description Test Setup
Speed Option
Unit
JEDEC Std 110 120 130
t
AVAV
t
RC
Read Cycle Time (Note 1)
128 Mb, 256 Mb
Min
110 120
ns
512 Mb, 1 Gb 120 130
t
AVQV
t
ACC
Address to Output Delay
CE# = V
IL
OE# = V
IL
128 Mb, 256 Mb
Max
110 120
ns
512 Mb, 1 Gb 120 130
t
ELQV
t
CE
Chip Enable to Output
Delay
OE# = V
IL
128 Mb, 256 Mb
Max
110 120
ns
512 Mb, 1 Gb 120 130
t
PAC C
Page Access Time
128 Mb, 256 Mb
Max
25 30
ns
512 Mb, 1 Gb 25 30
t
GLQV
t
OE
Output Enable to Output Delay Max 35 ns
t
AXQX
t
OH
Output Hold time from addresses, CE# or
OE#, Whichever Occurs First
Min 0 ns
t
EHQZ
t
DF
Chip Enable or Output Enable to Output
High-Z (Note 1)
Max 20 ns
t
OEH
Output Enable Hold Time
(Note 1)
Read Min 0 ns
Toggle and
Data# Polling
Min 10 ns
t
ASSB
Automatic Sleep to Standby time (Note 1)
CE# = V
IL
, Address
stable
Typ 5 µs
Max 8 µs