Specifications

February 2015 IS29GL_128S_01GS_00_Rev.A GL-S MirrorBit

Family 43

Data Sheet

5.5.1 Embedded Operation Error

If an error occurs during an embedded operation (program, erase, blank check, or password unlock) the

device (EAC) remains busy. The RY/BY# output remains Low, data polling status continues to be overlaid on

all address locations, and the status register shows ready with valid status bits. The device remains busy until

the error status is detected by the host system status monitoring and the error status is cleared.

During embedded algorithm error status the Data Polling status will show the following:

 DQ7 is the inversion of the DQ7 bit in the last word loaded into the write buffer or last word of the

password in the case of the password unlock command. DQ7 = 0 for an erase or blank check failure

 DQ6 continues to toggle

 DQ5 = 1; Failure of the embedded operation

 DQ4 is RFU and should be treated as don’t care (masked)

 DQ3 = 1 to indicate embedded sector erase in progress

 DQ2 continues to toggle, independent of the address used to read status

 DQ1 = 0; Write buffer abort error

 DQ0 is RFU and should be treated as don’t care (masked)

During embedded algorithm error status the Status Register will show the following:

 SR[7] = 1; Valid status displayed

 SR[6] = X; May or may not be erase suspended during the EA error

 SR[5] = 1 on erase or blank check error; else = 0

 SR[4] = 1 on program or password unlock error; else = 0

 SR[3] = 0; Write buffer abort

 SR[2] = 0; Program suspended

 SR[1] = 0; Protected sector

 SR[0] = X; RFU, treat as don’t care (masked)

When the embedded algorithm error status is detected, it is necessary to clear the error status in order to

return to normal operation, with RY/BY# High, ready for a new read or command write. The error status can