Specifications

February 2015 IS29GL_128S_01GS_00_Rev.A GL-S MirrorBit
®
Family 37
Data Sheet
5.3.6.8 DYB ASO
The system can access the DYB ASO by issuing the DYB entry command sequence during Read Mode. This
entry command does not use a sector address from the entry command. The DYB bit for a sector appears in
bit 0 of all word locations in the sector.
The DYB ASO allows the following activities:
 Read DYB protection status of a sector in bit 0 of any word in the sector.
 Set the DYB bit using a modified Word Programming command.
 Clear the DYB bit using a modified Word Programming command.
 ASO Exit using legacy Command Set Exit command for backward software compatibility.
 ASO Exit using the common exit command for all ASO - alternative for a consistent exit method.
5.3.6.9 Software (Command) Reset / ASO exit
Software reset is part of the command set (See Table 6.1, Command Definitions on page 57) that also
returns the EAC to standby state and must be used for the following conditions:
 Exit ID/CFI mode
 Clear timeout bit (DQ5) for data polling when timeout occurs
Software Reset does not affect EA mode. Reset commands are ignored once programming or erasure has
begun, until the operation is complete. Software Reset does not affect outputs; it serves primarily to return to
Read Mode from an ASO mode or from a failed program or erase operation.
Software Reset may cause a return to Read Mode from undefined states that might result from invalid
command sequences. However, a Hardware Reset may be required to return to normal operation from some
undefined states.
There is no software reset latency requirement. The reset command is executed during the t
WPH
period.
5.4 Status Monitoring
There are three methods for monitoring EA status. Previous generations of the IS29GL flash family used the
methods called Data Polling and Ready/Busy# (RY/BY#) Signal. These methods are still supported by the
IS29GL-S family. One additional method is reading the Status Register.
5.4.1 Status Register
The status of program and erase operations is provided by a single 16-bit status register. The status is
receiver by writing the Status Register Read command followed by a read access. When the Status Register
read command is issued, the current status is captured (by the rising edge of WE#) into the register and the
ASO is entered. The contents of the status register is aliased (overlaid) on the full memory address space.
Any valid read (CE# and OE# low) access while in the Status Register ASO will exit the ASO (with the rising
edge of CE# or OE# for t
CEPH
/t
OEPH
time) and return to the address space map in use when the Status
Register Read command was issued.
The status register contains bits related to the results - success or failure - of the most recently completed
Embedded Algorithms (EA):
 Erase Status (bit 5),
 Program Status (bit 4),
 Write Buffer Abort (bit 3),
 Sector Locked Status (bit 1),
 RFU (bit 0).
and, bits related to the current state of any in process EA:
 Device Busy (bit 7),
 Erase Suspended (bit 6),