User`s guide

LONWORKS LPT-10 Transceiver User’s Guide 6-5
Note that it may be possible to design a two-layer 10MHz Neuron 3150 Chip-based link
power node that will pass level "B" in some applications, depending on the mechanical
configuration. Early testing of prototype circuits at an outdoor EMI range should be used
to determine the effectiveness of these EMC techniques in a particular application.
ESD Design Issues
Electrostatic Discharge (ESD) is encountered frequently in industrial and commercial
use of electronic systems
10
. Reliable system designs must consider the effects of ESD and
take steps to protect sensitive components. Static discharges occur frequently in low-
humidity environments when operators touch electronic equipment. The static voltages
generated by humans can exceed 10kV. Keyboards, connectors, and enclosures provide
paths for static discharges to reach ESD sensitive components such as the Neuron Chip.
This section describes techniques to design ESD immunity into LPT-10 transceiver-based
products. For a discussion of ESD issues for the LPI-10 module, see [1].
ESD testing is important to ensure that a link powered node and its network connection
can withstand real-world exposure to static discharges. In addition, the European
Community may adopt legal requirements for ESD testing in product qualifications
similar to the present EMI requirements
11
.
Designing Systems for ESD Immunity
As with the EMI design issues discussed above, ESD hardening of link power nodes is
different than hardening products that have an explicit earth ground connection. If
C
leak,GND
can be kept small (say, ≤ 5pF), and if the link power node is housed inside
a plastic enclosure that offers no access for ESD hits (as in an enclosed IR motion sensor
), then ESD testing is fairly easy to pass. The current from static discharges to the
node's network connector will travel out the network cable, with very little energy
coupled into the node's circuitry.
In nodes that have a larger C
leak,GND
(up to about 20pF), more energy travels from
network connector ESD hits through the LPT-10 transceiver’s ESD protection circuitry to
logic ground, and from there to earth ground through C
leak,GND
. In this type of node,
it is important to lay out the ground plane and ground guarding so that the LPT-10
transceiver’s ground (pin 6) is connected directly to the largest section of the ground
plane without any sensitive circuitry in the path. When the ESD hit is directed into
logic ground by the LPT-10 transceiver, the transient current can flow out to earth ground
via C
leak,GND
without causing disruptive voltage bounces in other node circuitry.
ESD hits should not be allowed to reach a link power node's internal circuitry.
Adequate creepage and clearance distances should be built into each node's enclosure to
prevent discharges to anything other than the network wiring connector. If metal must
be accessible on the outside of a node’s enclosure, then it may be necessary to provide an
earth ground connection to that metal. For example, if metal toggle switches must be
user-accessible, then it may be necessary to mount the switches on a metal plate that is
earth grounded. In this way, ESD hits to the toggle switch handles will be diverted to
the local earth ground. The node's logic ground must still remain isolated from this
earth-grounded "guard" plate, and the leakage capacitance from logic ground to earth