User`s guide

LONWORKS FTT-10A Transceiver User’s Guide 2-7
1. "Star" Ground Configuration: The distribution of functional circuit blocks on the
PCB should be in the form of a star, with the power connector, network connector and
any "chassis ground" connection all located as close as practical to the center of the
star. This star ground distribution is illustrated in figure 2.4. The goal of star
ground distribution is to conduct transients out of the node with minimal disruption
to other function blocks. If the node has a metal chassis, then ESD and other
transients will generally return to that chassis via the star ground center point. If
the node’s logic ground is connected to this chassis ground, then connection should be
made at this single point only. If a node is housed in a plastic enclosure and is
powered with an isolating transformer, then there may not be any explicit earth
ground or "chassis" ground available. In this case, it is still important for the network
connector and power supply connector to be located near the center of the star.
2. PC Board Spark Gaps
: The PC board layout should be designed so that substantial
ESD hits from the network will discharge directly to the star ground center point.
This is accomplished by creating PCB spark gaps from NET1 and NET2 to ground as
detailed in figure 2.4. This design yields a metal-to-metal spacing on the PC board of
0.39mm (0.015”), which permits ESD hits above roughly 3kV to discharge directly to
ground. This limits the amount of energy that must be absorbed by the FTT-10A
transceiver and its associated circuitry. The keep-out area noted in figure 2.3 is
designed to eliminate unintended discharge paths. If the PC board must be
conformally coated or otherwise insulated, please refer to figure 2.2 for an alternate
schematic that does not rely on exposed metal spark gaps.
3. D1/D2 Clamp Diodes
: The diodes D1 and D2 clamp the node side of the FTT-10A
transformer signals between Vcc and ground. The Vcc and ground connections
between D1, D2, and the FTT-10A transceiver must be made using the low
inductance technique shown in figure 2.3 to ensure that transient energy remaining
after any discharge to the spark gap does not disrupt the FTT-10A transceiver or the
Neuron Chip. Note that the Vcc and ground connections of diodes D1 and D2 are
designed to return transient currents to the FTT-10A ground pin and the star ground
center point.
4. D3/D4 Clamp Diodes
: The diodes D3 and D4 in figure 2.1 (D3 through D6 in figure
2.2) clamp the network side of the FTT-10A transformer signals to ground through C2
during ESD transients. The connections between D3, D4, and C2 must be made using
the low inductance technique shown in figure 2.3 to ensure that transient energy
remaining after any discharge to the spark gap does not disrupt the Neuron Chip.
Note that the connection of C2 is designed to return transient currents to the star
ground center point.