LONWORKS® Router User’s Guide 078-0018-01H
Echelon, LNS, LONMARK, LonTalk, LONWORKS, Neuron, NodeBuilder, 3120, 3150, and the Echelon logo are trademarks of Echelon Corporation registered in the United States and other countries. Other brand and product names are trademarks or registered trademarks of their respective holders.
Welcome A LONWORKS® router connects two communications channels within a LONWORKS network, and routes LonTalk® messages between them. Using a LONWORKS router supports the installation of small or large networks, with dozens to thousands of nodes. This document describes how to design and develop a LONWORKS router based on the Echelon Router 5000 chip, the Echelon FT Router 5000 chip, or the Echelon RTR-10 Router Core Module.
• LonMark® Application Layer Interoperability Guidelines. This manual describes design guidelines for developing applications for open interoperable LONWORKS devices, and is available from the LonMark Web site, www.lonmark.org. • LonWorks FTT-10A Free Topology Transceiver User's Guide (078-015601G). This manual provides specifications and user instructions for the FTT-10A Free Topology Transceiver. • LonWorks LPT-11 Link Power Transceiver User's Guide (078-0198-01A).
FCC Notice The RTR-10 Router Core Module is designed to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. The Router 5000 chip is designed to comply with FCC Part 15 Subpart B and EN 55022 Level B. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment.
Table of Contents Welcome ......................................................................................................... iii Audience ........................................................................................................ iii Related Documentation ................................................................................ iii Getting Support ............................................................................................. iv FCC Notice ..........................
Power Requirements .................................................................................... 45 RTR-10 Power Requirements ............................................................... 45 Series 5000 Router Power Requirements ............................................ 45 Power Supply Decoupling and Filtering ..................................................... 46 Low Voltage Protection ................................................................................
Set Router Mode ............................................................................ 102 Group or Subnet Table Clear ....................................................... 103 Group or Subnet Table Download ................................................ 103 Group Forward .............................................................................. 103 Subnet Forward............................................................................. 104 Group No Forward .................................
1 Introduction to LONWORKS Routers This chapter describes the router theory of operation, including router types, LonTalk protocol support for routers, and router use of message buffers.
Introduction In general terms, a router is a device that forwards data packets between communications networks. The router connects to the data lines from each network, and reads address information in each data packet to determine the packet’s destination. A LONWORKS router connects two communications channels within a LONWORKS network, and routes LonTalk messages between them. Using a LONWORKS router supports the installation of small or large networks, with dozens to thousands of nodes.
network where the devices are subject to frequent physical relocation, or if cable installation is difficult. For each of these cases, you use a router to connect the dissimilar LONWORKS channels. • Enhance the reliability of the LONWORKS network. The two channels that connect to a router are logically isolated, so a failure on one channel does not affect the other channel.
• RTR-10 Router Core Module (Model: 61000R) A compact module used by OEMs to build LONWORKS routers. The RTR10 consists of the core electronics and firmware needed to implement a router. • Router 5000 (Model: 14315R) A semiconductor product used by OEMs to build half-routers or full routers for various LONWORKS channel types. The Router 5000 includes the firmware required to implement a half-router.
Service Button and LEDs Power Supply RTR-10 Router Core Module Side A Transceiver Side B Transceiver Side A Network Connector Side B Network Connector Figure 2. Block Diagram of a LonWorks Router Based on the RTR-10 As the figure shows, an RTR-10 router and two transceiver modules (one to handle each of two channels connected by the router) can be mounted on a motherboard, along with a single power supply and two network connectors. This sub-assembly constitutes a LONWORKS router.
LONWORKS transceivers, including standard transceivers for free topology, link power, twisted pair, and power line. Using multiple communications media can minimize installation costs and increase system performance by allowing easily installed media, such as power line or link power, to be combined with highperformance media such as TP/XF-1250 twisted pair.
Channel Type Transceiver for Half Router Notes Link-power Echelon LPT-11 Link Power Transceiver (Model 50040) Add linear regulator and TX buffer circuit. Echelon provides special licensing for other transceiver types, such as a Power Line Smart Transceiver; contact Echelon Support for additional information. A complete router using the Router 5000 consists of two Router 5000 half routers, two transceivers, and a motherboard to connect the two half routers.
LONWORKS router. Although not shown in the figure, you can place a Router 5000 half router (with its transceiver module) and FT Router 5000 half router on the same motherboard to create a LONWORKS router. A complete LONWORKS router can be packaged in an enclosure to meet unique form factor and environmental requirements. Depending on the application, the package could contain a single router sub-assembly, or could include other application-specific hardware.
Router Types A LONWORKS router can use one of four routing algorithms: configured router, learning router, bridge, and repeater. This selection allows you to trade system performance for ease of installation. The configured router and learning router algorithms create intelligent routers that selectively forward messages based on network topology. Both sides of a router must use the same routing algorithm.
A forwarding table is used for each domain on each side of the router. Each forwarding table contains a forwarding flag for each of the 255 subnets and 255 groups in a domain. As shown in Figure 4 and Figure 5, these flags determine whether or not a message should be forwarded or dropped based on the destination subnet or group address of the message. A network management tool initializes the forwarding tables using the network management messages described in Chapter 7, Network Management Messages,.
the destination address is then checked to determine whether the message should be forwarded or dropped. The forwarding flags are all cleared whenever the router is reset, so the learning process restarts after a reset. The forwarding flag for a given subnet should never be cleared on both sides of a router. However, the flag can be cleared on both sides if a device is moved from one side of a router to the other side.
Page 1 * Applies to configured router only Is message addressed to group? Is the group fwd flag of the dest group set to forward? Yes No Yes A Is the subnet fwd flag for the source subnet set to forward? No Is message addressed to subnet/node? Yes B No Is the subnet fwd flag for the dest subnet set to forward? Yes No Forward packet No Message must be addressed as broadcast or 48-bit Neuron ID Is message dest subnet = zero? Drop packet Yes A No B Figure 5.
1 to channel B, then the same message could be forwarded by router 2 back to channel A, starting an endless loop of forwarded messages. Channel A Router 1 Router 2 Channel B Figure 6. Looping Topology The LonTalk protocol does not support topologies where loops can occur. However, looping topologies can be desirable for the following reasons: • Increased Reliability. Redundant routers can increase system reliability by providing multiple paths between two channels. • Support for Open Media.
PL Phase A Power Line Router Passive Coupling PL Phase B Figure 7. A Looping Topology with One Router Routers can be used between power line channels only if the two channels are fully isolated. Such isolation is generally not the case between two phases on the same circuit, but can be the case between phases on different distribution transformers. Use an Echelon PLCA-22 Power Line Communication Analyzer to confirm isolation between power line channels before installing power-line-topower-line routers.
outgoing buffer queue. Thus, priority processing of these outgoing messages is assured because the transmitting side will send messages from the priority output buffer queue before sending messages from the non-priority output buffer queue. Figure 8 shows the message flow through the input and output buffer queues. This message flow is duplicated for messages moving in the opposite direction, that is, another set of input and output buffer queues exist for messages flowing in the opposite direction.
buffer configurations for input buffers, output buffers, priority buffers, and nonpriority buffers. Table 3.
Application Buffer Out Priority 1 42 42 Network Buffer Out Priority 3 66 198 Total Allocated Bytes Unused 1343 1 65 65 Total Available Bytes for Transaction Records and Buffers 1408 Total Available Bytes for Buffers, including Default Transaction Records shown in first two lines, above 1313 You will not have a problem interchanging routers with Router Firmware Versions A, B, or C if you are not changing the router buffer or transaction record configuration.
In this case, reduce the number of lost messages by moving more of the packet buffering from the output queue to the input queue by increasing the size of the input queue and decreasing the size of the output queue. A router with a larger input queue can handle larger bursts of traffic, at the risk of priority messages being queued behind a number of non-priority messages. Router 5000 and FT Router 5000 Message Buffers Each router side has maximum 26 623 bytes of buffer space available.
Example: For a 20 MHz Router 5000 device (where both halves use the Router 5000 chip), a measured data transfer rate for sending a service-pin message between the router halves was approximately 1.2 μs per byte (or 830 kbytes/sec). Some additional latency was seen for the time between the beginning of the original packet transmission and the beginning of the forwarded packet transmission. For slower channel types, this router latency is not significant, but could become significant for faster channel types.
2 LONWORKS Router Electrical Interfaces This chapter provides an overview of the electrical interfaces for the RTR-10 Router Core Module, the Router 5000 chip, and the FT Router 5000 chip.
Overview This chapter describes the electrical interface and power requirements for a LONWORKS router. Electrical Interface The following sections describe the electrical interface for a LONWORKS router, including detailed descriptions of each of the RTR-10, Router 5000, and FT Router 5000 pins. RTR-10 Electrical Interface Figure 9 shows a schematic view of a connector for the RTR-10 Router Core Module, and Table 6 shows the pinout of the RTR-10 Router Core Module.
Pin Name Pin Description Pin Number ASVC~ A-side Service output 12 AXID0 A-side transceiver ID 0 (LSB) 20 AXID1 A-side transceiver ID 1 18 AXID2 A-side transceiver ID 2 17 AXID3 A-side transceiver ID 3 16 AXID4 A-side transceiver ID 4 (MSB) 15 BCLK1 B-side input clock 29 BCLK2 B-side output clock 33 BCP0 B-side network communication port 0 37 BCP1 B-side network communication port 1 38 BCP2 B-side network communication port 2 39 BCP3 B-side network communication port 3
ACLK2, BCLK1, and BCLK2 A 10 MHz crystal is provided for Side A of the RTR-10 router, which can run at only 10 MHz. This clock rate allows Side A to be used with transceivers running at interface bit rates from 9.8 kbps to 1.25 Mbps. The 10 MHz clock is output on the ACLK2 pin, which allows Side B to be tied directly to the same clock through pin BCLK1. Thus, no external components are required to support the same range of bit rates on Side B.
reinitialized. This reinitialization allows a network services tool to change parameters, such as the number of priority slots, without the new values’ being overwritten by the RTR-10 firmware. Table 7. RTR-10 Router Transceiver IDs ID Name Media Bit Rate (bps) Input Clock 01 (0x01) TP/XF-78 Transformer-isolated twisted pair 78k 10 MHz 03 (0x03) TP/XF-1250 Transformer-isolated twisted pair 1.
See Appendix A, Communications Parameters for LONWORKS Routers, for a listing of the communications parameters for each transceiver type. PKT The PKT output can be used as a network activity indicator. When packets are passed between the router sides, PKT is active. This signal uses the unbuffered IO0 signal from the Neuron Chips. You can add a pulse stretcher circuit driven by PKT to make an activity LED flash, as in the example circuit shown in Figure 27 in chapter 4.
SERVICE~ The SERVICE~ input drives both sides of the RTR-10 router from a single input. You can connect a pushbutton to this pin broadcast each side’s 48-bit Neuron ID on its channel (for example, during installation). Typical applications do not require debounce conditioning of a momentary pushbutton attached to the SERVICE~ pin.
Table 8 lists the pin assignments for the Router 5000 chip. All digital inputs are low-voltage transistor-transistor logic (LVTTL) compatible, 5 V tolerant, with low leakage. All digital outputs are slew-rate limited to reduce Electromagnetic Interference (EMI) concerns. Table 8.
Name Pin Number Type Description RST~ 28 Digital I/O Reset (active low) VIN3V3 29 Power 3.3 V Power Input VDD3V3 30 Power 3.3 V Power AVDD3V3 31 Power 3.
CP4 RXON TXON 39 38 37 VDD3V3 CS0~ 41 40 SDA_CS1~ VDD3V3 43 42 SCL VDD1V8 45 44 SCK MISO 47 46 MOSI 48 GND PAD SVC~ 1 36 GND IO0 2 35 NC IO1 3 34 NETP IO2 4 33 AGND ® IO3 5 32 NETN VDD1V8 6 31 AVDD3V3 IO4 7 30 VDD3V3 VDD3V3 8 29 VIN3V3 FT Router 5000 22 23 24 TDO XIN XOUT 20 21 TDI TMS 18 19 VDD3V3 TCK 16 VDDPLL 17 GNDPLL 25 TRST~ 26 12 VDD1V8 11 IO8 14 IO7 15 VOUT1V8 IO10 RST~ 27 IO11 28 10 13 9 IO6 IO9 IO5 Fig
Name Pin Number Type Description IO8 12 Digital I/O IO8 (side A to side B) IO9 13 Digital I/O IO9 (side A to side B) IO10 14 Digital I/O IO10 (side A to side B) IO11 15 Digital I/O IO11 (not used for routers) VDD1V8 16 Power 1.8 V Power Input (from internal voltage regulator) TRST~ 17 Digital Input JTAG Test Reset (active low) VDD3V3 18 Power 3.
Name Pin Number Type Description VDD3V3 42 Power 3.3 V Power SDA_CS1~ 43 Digital I/O for Memory I2C: serial data VDD1V8 44 Power 1.
Figure 13. Series 5000 Chip Clock Generator Circuit To ensure proper oscillator startup, the equivalent series resistance specification for the crystal should be ≤50 Ω, and the crystal shunt capacitance should be no greater than 7 pF. Using a 33 pF capacitor for C2 (in Figure 13), the Series 5000 router chip’s XOUT pin cannot be used to drive an external CMOS load.
XIN Series 5000 Router (Router 5000 or FT Router 5000) 10.0000 MHz 220 PPM 18 pF 1M XOUT 30 pF 200 GROUND GUARD A Side 33 pF XIN Series 5000 Router (Router 5000 or FT Router 5000) B Side XOUT Figure 14. Common Clock Connections See the Series 5000 Chip Data Book for more information about the clock requirements for a Series 5000 chip, including the Router 5000 and FT Router 5000.
wide variety of media interfaces (network transceivers) and operates over a wide range of data rates. The communications port for the Router 5000 is configured to operate in singleended mode. Table lists the pin assignments for the communications port pins. Table 10. Communications Port Pin Assignments Pin Drive Current Single-Ended Mode (3.
IO[11..0] These digital I/O pins provide the communications between the A side and B side of a Series 5000 router device. Connect the IO pins for one router side to the corresponding IO pin on the other router side, as shown in Figure 15. Note that you must provide 10 kΩ pull-up resistors for the IO6, IO7, and IO10 pins. During power-up, the router half performs signal arbitration tests that require the pull-ups on IO6 and IO7. The IO10 pull-up is for the handshake signal between router halves.
JTAG Interface (TCK, TDI, TDO, TMS, and TRST~) All Series 5000 chips (including the Router 5000 and FT Router 5000) provide an interface for the Institute of Electrical and Electronics Engineers (IEEE) Standard Test Access Port and Boundary-Scan Architecture (IEEE 1149.1-1990) of the Joint Test Action Group (JTAG) to allow a Series 5000 chip to be included in the boundary-scan chain for device production tests.
See the Series 5000 Chip Data Book for more information about the power and ground requirements for a Series 5000 chip, including the Router 5000 and FT Router 5000. If your router uses a Series 3100 half-router for one of its sides, you can use a low-dropout voltage regulator to provide power for the Series 5000 half-router (+5 V input from the Series 3100 router half power supply, and +3.3 V output for the Router 5000 chip. See Connecting Half-Routers: Series 5000 and Series 3100 for more information.
+ 3.3 V + 3.3 V + 3.3 V 100 pF Series 5000 Router (Router 5000 or FT Router 5000) RST~ To other devices A Side Reset Series 5000 Router (Router 5000 or FT Router 5000) 100 pF RST~ B Side Figure 16.
+5V +5V +5V 100 pF Series 5000 Router (Router 5000 or FT Router 5000) RST~ To other devices A Side Reset Series 3100 Router B Side 100 pF RESET~ Figure 17. Reset Circuit – Series 5000 Router with Series 3100 Router Typical applications do not require debounce conditioning of a momentary pushbutton attached to the RST~ pin.
its unique 48-bit Neuron ID and the application’s program ID. This information can then be used by a network management tool to install and configure the router. Table 11 lists the state of the Service LED for various device states. The Neuron firmware samples the SVC~ pin whenever it is not actively driving the pin low. A typical circuit for the SVC~ pin, where the A side and B side service pins are tied together, but with separate Service LEDs, is shown in Figure 18.
Table 11. Service LED Behavior during Different States Device State State Code Service LED Applicationless and Unconfigured 3 On Unconfigured (but with an Application) 2 Flashing Configured, Hard Offline 6 Off Configured 4 Off Defective External Memory — On The SVC~ pin is active low, and the service pin message is sent once per SVC~ pin transition. The service pin message goes into the next available non-priority output network buffer.
+3.3 V Series 5000 Router (Router 5000 or FT 5000 Router) A Side +5V +5V Broadcast ID Service SVC~ 8 mA Sink Drive Out +5V +5V Series 3100 Router B Side Broadcast ID SERVICE~ 8 mA Sink Drive Out Figure 19. Service Circuit – Series 5000 Router with Series 3100 Router Network Activity Indicator – Router 5000 Although the Router 5000 does not provide separate network indicator pins, you can use the CP[4..0] pins with appropriate indicator circuits to provide this functionality.
Figure 20 shows example RX and TX network activity indicator circuits for a Router 5000 half-router connected to an EIA-485 transceiver. You can use the same network activity circuits for other transceiver types, although other transceiver types have different connections to the Router 5000. See Developing a Router with the Router 5000 Chip for more information about connecting external transceivers to a Router 5000.
Network Activity Indicator – FT Router 5000 The FT Router 5000 provides two network indicator pins, RXON and TXON, that you can connect to LEDs to show network activity, as shown in Figure 21. You can optionally add pulse-stretching circuits to increase the visibility of the LEDs, although they are likely visible enough without pulse stretching. Also, because the RXON and TXON pins are not directly involved in communications, you do not need to add buffers. FT Router 5000 +3.
Table 12. Series 5000 Router Current Requirements Active Receive Current Transmit Current SysClk Typical Maximum 5 MHz 9 mA 15 mA 10 MHz 9 mA 15 mA 20 MHz 15 mA 23 mA 40 MHz 23 mA 33 mA 5 – 40 MHz Receive Current + 15 mA Receive Current + 18 mA The Series 5000 router chip requires a 3.3 V nominal power supply (3.0 V to 3.6 V range). The current requirements assume no load on digital I/O pins, and that the I/O lines are not switching.
RTR-10 Neuron Chips. In the sample circuit of Figure 27, protection is provided by a Motorola MC33164. See the Series 5000 Chip Data Book for information about internal low-voltage indications for Series 5000 chips, including the Router 5000 and FT Router 5000.
48 LONWORKS Router Electrical Interfaces
3 LONWORKS Router Mechanical Interfaces This chapter provides an overview of the mechanical interfaces for the RTR-10 Router Core Module, the Router 5000 chip, and the FT Router 5000 chip.
RTR-10 Mechanical Description The RTR-10 Router Core Module consists of a 67 mm by 23 mm by 7 mm (2.65 in by 0.9 in by 0.3 in) module with the core electronics and firmware required to implement a router. The RTR-10 is attached to a motherboard, using a 40position 0.050-inch spacing SIMM socket, such as a Molex® Incorporated 1.27mm (.050") Pitch SIMM Socket: • www.molex.com/customer.html?supplierPN=015821390 • www.molex.com/customer.
Figure 23. RTR-10 Recommended PCB Hole Pattern (Component Side, Vertical Mounting) Figure 24.
Figure 25. RTR-10 Recommended PCB Hole Pattern (Component Side, Horizontal Mounting) Decisions about component placement on the motherboard must consider electromagnetic interference (EMI) and electrostatic discharge (ESD) issues; see Chapter 5, LONWORKS Router Design Issues.
Figure 26.
4 Developing a LONWORKS Router This chapter describes the process of developing a router based on the RTR-10 Router Core Module, the Router 5000 chip, or the FT Router 5000 chip.
Developing a Router with the RTR-10 Module To create a LONWORKS router with the RTR-10, perform the following steps: 1. Build a router motherboard according to the specifications described in Chapter 2, LONWORKS Router Electrical Interfaces, and the guidelines described in Chapter 5, LONWORKS Router Design Issues. The motherboard can be part of custom application hardware, or can be a standalone board. Figure 27 shows a sample motherboard schematic for a TP/XF-78 to TP/XF-1250 twisted pair router.
Figure 27.
Using Predefined Transceivers The RTR-10 router includes built-in transceiver parameters for the transceivers listed in Table 7. When using any of these transceivers, the communications parameters are automatically programmed, as described in Chapter 2, LONWORKS Router Electrical Interfaces. The user's guide for each transceiver contains documentation on the interface requirements. You also must set the transceiver ID input for each side of the RTR-10..
The preceding four steps complete the configuration when a single custom transceiver is used. Proceed with the following steps if two custom transceivers are to be used with the RTR-10 router. 5. Remove power from the RTR-10 router. 6. Disconnect the predefined transceiver from Side A. 7. Select the custom transceiver ID (type 30, 0x1E) on Side A. 8. Attach the selected custom transceiver to Side B as shown in Figure 29, leaving the Side B transceiver ID set to 30 (0x1E).
initial testing, a manufacturing network for configuration during manufacture, or a production network for field installation. The following sections describe how to connect the Router 5000 to various transceiver types. After these descriptions is a set of example schematics for a simple TP/XF-1250 to EIA-485 twisted pair router.
Router 5000 +3.3 V 37 TXEN Differential Driver Circuit TPT/XF-1250 +5 V 6 CP2 VDD5 7 8 DATA_A VDD3V3 NET1 2 CP3 34 TX CP1 5 CP2 38 8 CP3 CT +3.3 V 4 CP1 32 RX CP0 +3.3 V 3 CP0 39 9 CP4 DATA_B 10k Comparator Circuit 1 GND +5 V 0.1 µF Figure 30.
Figure 31. Differential Driver Circuit Table 13. Bill of Materials for the Differential Driver Circuit Designator Value C6 470 pF R14 10 kΩ, 1% U101 SN74HCT240 Comparator Circuit Figure 32 shows a differential comparator circuit for connecting a Router 5000 to a TPT/XF-1250 transceiver. The differential comparator circuit drives the Router 5000’s receive (CP0) signal based on the TPT/XF-1250 transceiver’s differential receive signals (CP0 and CP1).
Figure 32. Differential Comparator Circuit Table 14. Bill of Materials for the Differential Comparator Circuit Designator Value C2, C3 10 µF C4 18 pF C8, C9 0.1 µF L1 100 µH, ±20%, Isat ≥ 100 mA, DCR ≤ 0.
Designator Value R7, R8 499 Ω, 1% R9, R11 2.15 kΩ, 1% R10, R12 10 kΩ, 1% U103 LT1016CN8 U104 AD826AN Using an EIA-485 Transceiver You can use the Router 5000 with commercially available EIA-485 transceivers. A number of wire types can be supported, along with multiple data rates (up to 1.25 Mbps), as listed in the Series 5000 Chip Data Book. With an EIA-485 transceiver, the common-mode network voltage can range between –7 V to +12 V.
EIA-485 Transceiver Router 5000 +3.3 V +5 V 8 VDD3V3 32 RX R 34 TX RE~ VDD CP0 0.1 µF B CP1 B 37 TXEN DE A CP2 A 38 CP3 +3.3 V D GND 10k 39 12V CP4 10k MUR115 (x4) 12V Figure 33. EIA-485 Twisted-Pair Interface (Uses Single-Ended Mode) The EIA-485 specification requires a common ground reference for all transceivers. This common ground reference can be provided by adding a third conductor in the network cable or a separate connection to common ground at each device.
The FTT-10A transceiver is compatible with Echelon’s LPT-11 Link Power Transceiver, and these transceivers can communicate with each other on a single twisted pair cable. This capability provides an inexpensive means of interfacing to nodes whose current or voltage requirements would otherwise exceed the capacity of the link power segment.
Router 5000 FTT-10A Transceiver +5 V +5 V U1 8 VDD3V3 OUTPUT +3.3 V D1 Low drop-out linear regulator C3 0.1 µF INPUT +5 V C4 1 µF 36 1 7 T1 VCC C6 0.1 µF C5 0.1 µF 8 9 GND GND T2 D2 4 32 RX 37 CP0 CP2 RXD +5 V + NETA 38 CP3 C8 22 µF 5 34 TX CP1 TXD U2 NETB D3 OE +3.3 V 39 28 CP4 RST~ R1 10k 3 C7 1000 pF D4 2 + NET_A XIN XOUT 23 NET_B 24 C9 22 µF R2 1M R3 200 +5 V 6 CLK U3 GROUND GUARD C1 33 pF 10 MHz 18 pF C2 30 pF Figure 34.
Designator Value U1 TDA3663 (or similar LDO regulator) U2 74AHCT1G126 U3 74AHCT1G04 (or a 74AHCT1G126 with OE tied high) Important: Because the Router 5000 XOUT pin drives the FTT-10A CLK signal, the value of C2 does not match the value of C1. The value for C2 is specified as 30 pF based on an input capacitance for the buffer/line driver of 3 pF at 25 ºC (so that the total capacitance for the XOUT pin is 33 pF). For the 74AHCT1G126 part, input capacitance can vary over temperature, up to 10 pF.
communication port (CP) or the I/O lines of the Router 5000 must be electrically isolated. The LPT-11 transceiver receives its clock input from the Router 5000 through its CMOS input CLK pin. This pin is driven by the XOUT output of the Router 5000, buffered with a standard bus buffer/line driver that supports TTLcompatible input and 5V CMOS output. Clock traces should be kept short (≤2 cm) to minimize noise coupling.
LPT-11 Link Power Transceiver Router 5000 L1 1 mH 3 4 INDUCTOR V+ U1 OUTPUT +3.3 V 8 VDD3V3 Low drop-out linear regulator INPUT +5 V VCC C4 22 µF C3 0.1 µF C5 0.1 µF 6 36 GND 37 GND 10 32 RX CP2 C6 100 µF 5 RXD CP0 +5 V 1 38 9 34 TX CP3 CP1 TXD U2 NET_A OE NETA 2 NET_B +3.3 V 39 NETB 28 CP4 RST~ R1 10k XIN XOUT 23 24 R2 1M R3 200 +5 V 7 CLK U3 GROUND GUARD C1 33 pF 10 MHz 18 pF C2 30 pF Figure 35.
Designator Value R2 1 MΩ R3 200 Ω U1 TDA3663 (or similar LDO regulator) U2 74AHCT1G126 U3 74AHCT1G04 (or a 74AHCT1G126 with OE tied high) Important: Because the Router 5000 XOUT pin drives the LPT-11 CLK signal, the value of C2 does not match the value of C1. The value for C2 is specified as 30 pF based on an input capacitance for the buffer/line driver of 3 pF at 25 ºC (so that the total capacitance for the XOUT pin is 33 pF).
Figure 36.
Figure 37.
Developing a Router with the FT Router 5000 Chip To create a LONWORKS router with the FT Router 5000, perform the following steps: 1. Build a router motherboard according to the specifications described in Chapter 2, LONWORKS Router Electrical Interfaces, and the guidelines described in Chapter 5, LONWORKS Router Design Issues. The motherboard can be part of custom application hardware, or can be a standalone board. 2. Program the serial EEPROM for each router half.
Table 17. Bill of Materials for the FT Router 5000 and FT-X3 Interconnection Designator Value Description R1 4.
Connecting Half-Routers: Series 5000 and Series 3100 You can connect a Series 5000 half-router to a Series 3100 half-router to provide routing functions for transceiver and channel types that the Series 5000 router chip does not directly support, for example, a PL-20 channel. Important: Echelon provides special licensing for many of these other transceiver types, such as a Power Line Smart Transceiver; contact Echelon Support for additional information.
VDD3V3 CS0~ CP4 RXON TXON 41 40 39 38 37 SDA_CS1~ VDD3V3 43 42 SCL VDD1V8 45 44 SCK MISO 47 46 MOSI 48 GND PAD SVC~ 1 36 GND IO0 2 35 NC IO1 3 34 NETP IO2 4 33 AGND ® IO3 5 32 NETN VDD1V8 6 31 AVDD3V3 IO4 7 30 VDD3V3 VDD3V3 8 29 VIN3V3 FT Router 5000 22 23 24 XIN XOUT TDI TDO 20 21 TMS 18 19 VDD3V3 TCK 16 VDDPLL 17 GNDPLL 25 TRST~ 26 12 VDD1V8 11 IO8 14 IO7 15 VOUT1V8 IO10 RST~ 27 IO11 28 10 13 9 IO6 IO9 IO5 Fi
Name Pin Number Type Description IO8 12 Digital I/O IO8 (side A to side B) IO9 13 Digital I/O IO9 (side A to side B) IO10 14 Digital I/O IO10 (side A to side B) IO11 15 Digital I/O IO11 (not used for routers) VDD1V8 16 Power 1.8 V Power Input (from internal voltage regulator) TRST~ 17 Digital Input JTAG Test Reset (active low) VDD3V3 18 Power 3.
Name Pin Number Type Description VDD3V3 42 Power 3.3 V Power SDA_CS1~ 43 Digital I/O for Memory I2C: serial data VDD1V8 44 Power 1.
Router 5000, the default communications parameters allow you to load an application image over a 78 kbps network, for example during device manufacturing. Devices that use a 78 kbps transceiver (such as a 78 kbps EIA485 transceiver or an LPT-11 Link Power Transceiver) can use the default communications parameters within development or manufacturing test networks.
• Neuron 5000 for a Router 5000 FT 5000 for an FT Router 5000 Clock Multiplier: 2 (Recommended) Important: If the other router-half uses a Series 3100 chip, do not specify a value higher clock multiplier value than 2. You can specify a value of 4 if both sides are Series 5000 router chips. Do not specify a value of 8. • System image version: Ver19 • Memory – Extended non-volatile: None • Extended on-chip RAM: 0x8000 – 0xE7FF • All other memory options: (Leave as default values) Figure 40.
Figure 41. Example NodeBuilder Device Template for the Router 5000 You can also use this template to export a specific domain configuration (limited to domain 0) along with a receive transaction timer (typically, 768 ms) and a location string. Buffer Configurations The NodeBuilder FX Development Tool issues an error if you try to build a target with too large a buffer configuration.
Example Neuron C Source This section shows an example Neuron C file for Series 5000 router development. This file primarily controls the router’s buffering, but it also contains important declarations to set up the parallel IO configuration and explicit addressing. // // Copyright (c) 2011 Echelon Corporation. // All Rights Reserved. #include #include
eeprom unsigned int mip_eevars[2] = { 0x00, // M/S Designation. 0x00 // TXID, always last (not used).
5 LONWORKS Router Design Issues This chapter examines a number of design issues, including a discussion of PCB layout, electromagnetic interference (EMI), and electrostatic discharge (ESD), for LONWORKS routers.
PCB Layout Guidelines Printed circuit board (PCB) layout for a Router 5000 or FT Router 5000 is similar to layout for a Neuron 5000 Processor or FT 5000 Smart Transceiver, and should include the following general features: • Star-Ground Configuration: Arrange the various blocks of the device that directly interface with off-board connections (the network, any external I/O, and the power supply cable) so that they are together along one edge of the PCB.
information about PCB layout and electromagnetic compatibility (EMC) design guidelines for a Series 5000 Chip, including the Router 5000. ESD Keepout Area Network Connector Center of Star Ground Power Supply Connector TPT/XF-1250 PCB Power Supply Circuitry Figure 42.
transceiver PCB are the clamping diodes (D6-D9) for the transceiver’s receive signals. FT Router 5000 Figure 43 shows a portion of the top layer of a 4-layer PCB layout for an FT Router 5000 half-router, including the FT-X3 Communications Transformer and the other building blocks of a PCB design. See Chapters 3 and 4 of the Series 5000 Chip Data Book for additional information about PCB layout and electromagnetic compatibility (EMC) design guidelines for a Series 5000 Chip, including the FT Router 5000.
EMI Design Issues The high-speed digital signals associated with microcontroller designs can generate unintentional Electromagnetic Interference (EMI). High-speed voltage changes generate RF currents that can cause radiation from a product with a length of wire or piece of metal that can serve as an antenna. Products that use the RTR-10 router will generally need to demonstrate compliance with EMI limits enforced by various regulatory agencies.
• Most of the RF noise originates in the CPU portion of the RTR-10 router—which effectively means the entire board. Most of the RF noise originates with the Series 5000 router rchip. • Most of the EMI will be radiated by the network cable and the power cable. • Filtering is generally necessary to keep RF noise from getting out on the power cable. • EMI radiators should be kept away from the RTR-10 router or Series 5000 router chip to prevent internal RF noise from coupling onto the radiators.
inches) along a clean surface. Dirty surfaces can allow arcing over even longer creepage distances. When ESD hits to circuitry cannot be avoided through creepage, clearance, and ground guarding techniques (that is, at external connector pins), explicit clamping of the exposed lines is required to shunt the ESD current.
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6 Installing a LONWORKS Router This chapter describes how to install a LONWORKS router.
Introduction To install a LONWORKS router, perform the following steps: 1. Define a network topology. 2. Physically attach the router to a LONWORKS network. 3. Connect power to the router. 4. Logically install the router on the network. 5. Test the router installation. The following sections describe these steps in more detail. Defining a Network Topology There are many possible network topologies when using routers.
Proper electrical termination is essential for each twisted-pair channel. Failure to terminate the network can degrade performance, and in some cases, eliminate a device’s ability to communicate with other devices. For TP/XF and TP/RS485 channels, use the terminator circuits shown in Figure 44. You can also use the terminators provided with the NodeBuilder FX Development Tool. TP/XF-78, TP/XF-1250, or TP/RS485 Alternate for TP/RS485 Only 59 Ω 1% 0.15 µF 10% 340 Ω 1% 0.
Installing the Router on a Network After a router is physically attached to a network, and powered-up, it must be logically installed on the network. You can install a router using a network management tool, such as OpenLNS CT.
5. Initialize the routing tables using the Set Router Mode network management message. 6. Change the router state on both sides of the router to Configured, on-line using the Set Node Mode network management message. Testing Router Installation After a router has been installed, you can use the Query Status network diagnostic message to ensure that it is operational. If no response is received, query all intermediate routers to determine where the fault occurred.
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7 Network Management Messages This chapter describes network management messages for LONWORKS routers. These messages are used for router installation, as described in Chapter 6, Installing a LONWORKS Router.
Introduction As described in Chapter 6, routers are installed using network management messages. These messages are sent as explicit messages by a network management tool, such as OpenLNS CT. Routers respond to many of the same messages as any LONWORKS device, but also have an additional set of routerspecific messages, as listed in Table . Table 19.
Network Management Message Request Code Success Response Failed Response Update Domain 0x63 0x23 0x03 Leave Domain 0x64 0x24 0x04 Update Key 0x65 0x25 0x05 Query Domain 0x6A 0x2A 0x0A Set Node Mode 0x6C 0x2C 0x0C Read Memory 0x6D 0x2D 0x0D Write Memory 0x6E 0x2E 0x0E Checksum Recalculate 0x6F 0x2F 0x0F Memory Refresh 0x71 0x31 0x11 The following exceptions apply to standard network management messages when used with routers: • The Query Status network diagnostic mess
Table 22.
typedef enum { NORMAL = 0, // Not a temporary bridge. INIT_RTR_TABLE = 1, // Copy forwarding tables from EEPROM // for configured routers. // Initialize forwarding tables for // learning routers. TEMP_BRIDGE = 2 // Temporarily a bridge until next reset // or NORMAL router mode request. } rtr_mode; typedef rtr_mode NM_rtr_mode_request; Group or Subnet Table Clear This message clears all entries in either the group or subnet forwarding table for a single domain for a single router side.
EEPROM flags are set, otherwise only the RAM flag is set, allowing temporary forwarding for a given group. This message uses the Request-Response protocol. The configuration checksum in EEPROM is updated if EEPROM is changed.
This message uses the Request-Response protocol. The configuration checksum in EEPROM is updated if EEPROM is changed. typedef struct { unsigned unused1 : 1; unsigned domain_index : 1; unsigned unused2 : 5; unsigned ram_or_eeprom : 1; // 0 => RAM, 1 => RAM+EEPROM unsigned subnet; } NM_rtr_subnet_nofwd_request; Group or Subnet Table Report This message reports the current settings of either group or subnet forwarding tables in EEPROM or RAM for the specified domain for a single router side.
typedef struct { algorithm type; // CONFIGURED, LEARNING, BRIDGE, // or REPEATER rtr_mode mode; // TEMP_BRIDGE or NORMAL } NM_rtr_status_response; Far Side Escape Code When this message code is placed in the message, and is followed by any network management or network diagnostic message (except the escape message itself), that message is passed to the other (far) router side for processing. Any responses are returned in the normal manner.
mode offset count form data = = = = = READ_ONLY_RELATIVE (1) 0x0019; 1; BOTH_CS_RECALC (1) buffer_sizes; The buffer_sizes value contains two nibble fields that control the size of both the input and output buffers. The output size value also controls the priority output buffer size. The default size is 66 bytes (or SIZE_66 = 0xB). When changing this value, you should set both nibble fields to the same value.
typedef enum { COUNT_1 = 0x2; COUNT_2 = 0x3; COUNT_3 = 0x4; COUNT_5 = 0x5; COUNT_7 = 0x6; COUNT_11 = 0x7; COUNT_15 = 0x8; COUNT_23 = 0x9; COUNT_31 = 0xA; COUNT_47 = 0xB; COUNT_63 = 0xC; } queue_count_entry; Set Input and Non-Priority Buffer Queue Count The buffer queue counts are selected using a Write Memory network management message with the following paramters: mode offset count form data = = = = = READ_ONLY_RELATIVE (1) 0x001C; 1; BOTH_CS_RECALC (1) queue_counts; The queue_counts value contains two
A Communications Parameters for LONWORKS Routers LONWORKS routers are initially programmed with communications parameters as listed in this appendix. Parameters for LONMARK approved transceivers correspond to the parameters defined by the LONWORKS Interoperability Guidelines. Parameters specified as “Configurable” can be changed by a network services tool. These parameters only apply to routers with router firmware version 5 or newer.
Communications Parameters Table , 24, 25, and Table together list the communications parameters for LONWORKS routers. Table 23. Communications Parameters, Part 1 Parameter TP/XF-78 TP/XF-1250 TP/FT-10 TP/RS485-39 Transceiver ID 1 (0x01) 3 (0x03) 4 (0x04) 5 (0x5) Media Isolated Twisted Pair Isolated Twisted Pair Free Topology or Link Power EIA-485 Twisted Pair Neuron Chip to Transceiver Interface Differential Differential Single Ended Single Ended Interface Bit Rate 78 kbps 1.
Parameter TP/XF-78 TP/XF-1250 TP/FT-10 TP/RS485-39 Alternate Rate N/A N/A N/A N/A Wakeup Pin Direction N/A N/A N/A N/A XCVR Controls Preamble N/A N/A N/A N/A General Purpose Data N/A N/A N/A N/A Allow Node Override N/A N/A N/A N/A Receive Start Delay 2.9 bits 14.0 bits 9.0 bits 2.0 bits Receive End Delay 0.0 bits 0.0 bits 0.0 bits 0.0 bits Indeterminate Time 24.0 bits 25.0 bits 24.0 bits 4.0 bits Min Interpacket Time 0.0 bits 0.0 bits 0.0 bits 0.
Parameter RF-10 PL-10 PL-20C PL-20N Number of Priority Slots Configurable; default = 4 slots Configurable; default = 8 slots Configurable; default = 8 slots Configurable; default = 8 slots Average Packet Size Configurable; default = 15 bytes Configurable; default = 15 bytes Configurable; default = 15 bytes Configurable; default = 15 bytes Oscillator Accuracy 200 ppm 200 ppm 200 ppm 200 ppm Oscillator Wakeup 0 µsec 0 µsec 0 µsec 0 µsec Collision Detect (CD) No N/A N/A N/A CD Ter
Parameter RF-10 PL-10 PL-20C PL-20N Preamble Length N/A 36.7 bits 33.5 bits 33.5 bits Use Raw Data No No No No Table 25. Communications Parameters, Part 3 Parameter PL-30 TP/RS485625 TP/RS4851250 TP/RS485-78 Transceiver ID 18 (0x12) 10 (0x0A) 11 (0x0B) 12 (0x0C) Media Power Line EIA-485 Twisted Pair EIA-485 Twisted Pair EIA-485 Twisted Pair Neuron Chip to Transceiver Interface Special Purpose Single Ended Single Ended Single Ended Interface Bit Rate 625 kbps 625 kbps 1.
Parameter PL-30 TP/RS485625 TP/RS4851250 TP/RS485-78 Network Bit Rate 1882 bps 625 kbps 1.25 Mbps 78 kbps Alternate Rate N/A N/A N/A N/A Wakeup Pin Direction Output N/A N/A N/A XCVR Controls Preamble Yes N/A N/A N/A General Purpose Data 00 8A 00 00 00 00 00 N/A N/A N/A Allow Node Override Yes N/A N/A N/A Receive Start Delay 1.0 bit 2.0 bits 2.0 bits 2.0 bits Receive End Delay 10.4 bits 0.0 bits 0.0 bits 0.0 bits Indeterminate Time 0.0 bits 4.0 bits 4.
Parameter FO-10 DC-78 DC-625 DC-1250 Minimum Clock Configurable; default = 10 MHz Configurable; default = 10 MHz Configurable; default = 10 MHz Configurable; default = 10 MHz Number of Priority Slots Configurable; default = 16 slots Configurable; default = 0 slots Configurable; default = 0 slots Configurable; default = 0 slots Average Packet Size Configurable; default = 15 bytes Configurable; default = 15 bytes Configurable; default = 15 bytes Configurable; default = 15 bytes Oscillator
Parameter FO-10 DC-78 DC-625 DC-1250 Missed Preamble 4.0 bits 0.0 bits 0.0 bits 0.
B Determining RTR-10 Firmware Version In order to understand the buffer capacity of your RTR-10 router, you need to determine which version of router firmware is included with your product. The photos on the following page will help you make this determination.
Router Firmware Version The router firmware version is printed on the label on the memory containing the router firmware. The label will have a 9-digit part number starting with "726" followed by a version number. The letters "A," "B," or "C" indicate router firmware version A, B, or C. The following figure illustrates the location of the firmware version label for the RTR-10 Router Core Module.
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