Hardware Owner's manual
Table Of Contents
- Welcome
- Audience
- Related Documentation
- FTXL Hardware Overview
- FTXL Developer’s Kit Hardware
- FTXL Transceiver Hardware Interface
- FPGA Design for the FTXL Transceiver
- Working with the Altera Development Environments
- Using the Bring-Up Application to Verify FTXL Hardware Design
- Index
FTXL Hardware Guide 83
signals.
See
pins
software-controlled reset, 27
SOPC Builder, 54
status signals, bring-up application, 66
T
test
data passing, 76
interrupt, 78
network communications, 80
reset, 71
service pin, 79
token passing, 73
timers, 48
timing, reset, 27
token passing, 23
token-passing test, bring-up application, 73
transceiver interrupt, 47
transceiver reset, 47
transferring data, 23
U
uplink control flow, 29
USB-Blaster download cable, 55
W
watchdog timer, 27