Hardware Owner's manual
Table Of Contents
- Welcome
- Audience
- Related Documentation
- FTXL Hardware Overview
- FTXL Developer’s Kit Hardware
- FTXL Transceiver Hardware Interface
- FPGA Design for the FTXL Transceiver
- Working with the Altera Development Environments
- Using the Bring-Up Application to Verify FTXL Hardware Design
- Index
FTXL Hardware Guide 67
Signal Name FTXL Transceiver Pin Action
D2 2
D3 43
D4 42
D5 36
D6 35
D7 32
When LonReadTransceiverDataRegister() reads the data register, the FTXL_PIO
component affects FTXL Transceiver pins as listed in
Table 21.
Table 21. Reading from the Data Register
Signal Name FTXL Transceiver Pin Action
CS~ 31 Asserted (low)
R/W~ 30 Deasserted (high)
A0 27 Deasserted (low)
D0 4
D1 3
D2 2
D3 43
D4 42
D5 36
D6 35
D7 32
Read as data values
As described in
Token Passing and Handshaking
on page 23, communications
between the Nios II processor and the FTXL Transceiver use a token passing
protocol. Initially after a reset, the Nios II processor has the token, and can
perform either of the following actions:
• Write a data packet consisting of a non-zero length, one or more data
bytes, and a “null” token byte (value of 0x0)
• Pass the token by writing two consecutive 0x0 data bytes