Hardware Owner's manual
Table Of Contents
- Welcome
- Audience
- Related Documentation
- FTXL Hardware Overview
- FTXL Developer’s Kit Hardware
- FTXL Transceiver Hardware Interface
- FPGA Design for the FTXL Transceiver
- Working with the Altera Development Environments
- Using the Bring-Up Application to Verify FTXL Hardware Design
- Index
FTXL Hardware Guide 31
Figure 10. Timing Diagram for Reading the Length Byte
Figure 11 shows a detailed timing diagram for reading the data. The figure also
shows the read handshake for each byte of data. However, the figure shows only
the first three bytes of the data.
Figure 11. Timing Diagram for Reading Data