User Guide

Hardware and Software Design • Manufacturing Services
P a g e 23
is stored in the FIFO the status will be '0'.
Tx_fifo_full3-0 is '1' when the Transmit FIFO is full for that channel. When there is
less than a full FIFO the status will be '0'.
Rx_fifo_mt3-0 is '1' when the Receive FIFO is empty for that channel. When data
is stored in the FIFO the status will be '0'.
Rx_fifo_full3-0 is '1' when the Receive FIFO is full for that channel. When there is
less than a full FIFO the status will be '0'.
Dat_in is the parallel data read from the parallel port. Each bit is re-synchronized
to the PCI clock and presented without further filtering. Read the state of the
parallel port lines from this port. Please use the COS input features to capture
transitions. Please note that the input port is independent of the port direction.
If the port is defined to be an output then reading this port will return the Parallel
Data output definition. If the direction is input then this port will return the state
of the IO lines and may not match the parallel output data definition.