User guide

Viz Engine Administrator’s Guide

10.4.1 Prerequisites

• PCI / PCI Express Sealevel I/O device with 8, 16 or 32 digital inputs. Devices

connected via Ethernet or USB cannot be used.

• Viz Engine 3.3 (rev 8394) or later

• Installed Matrox X.mio or X.mio2 video board (this is required for getting the actual

field which is played out)

10.4.2 Functionality

Currently there are five commands available which enables you to queue commands

for execution when a pin on the Sealevel board shows a raising or trailing edge. For

every Pin an arbitrary amount of commands can be queued for the raising and trailing

event. Every command can be armed with a counter which tells Viz Engine how often

the command should be executed before it is removed from the queue. A counter of 0

tells Viz Engine that the command should never be removed from the queue.

The following diagram illustrates the Flow of the GPI signal from the sender until the

consequences of the executed command are rendered into the correct position in the

Matrox ringbuffer. As soon as a GPI sender changes the status of a pin, connected to

the Sealevel device, the change is reflected in an internal register of the card. In Viz

Engine a thread polls this register every millisecond. As soon as a change is found it

calculates the timestamp for when the command should be executed.

The thread looks for the pin command in the Command map and queues the command

into the Timestamped commands queue. As the actual depth of the Matrox ring buffer

is known the render loop checks every field if it is time to execute a command from the

queue. This guarantees that the command is executed at the correct field, no matter

how large or full the ringbuffer actually is.