TP400 PC/104-PLUS PC COMPATIBLE COMPUTER TECHNICAL REFERENCE MANUAL Revision B00 TRM-TP400 158004.
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All information in this manual is believed to be accurate and reliable. However, no responsibility is assumed by DSP Design Limited for its use. Since conditions of product use are outside our control, we make no warranties express or implied in relation thereto. We therefore cannot accept any liability in connection with any use of this information. Nothing herein is to be taken as a license to operate under or a recommendation to infringe any patents.
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CONTENTS 1 INTRODUCTION ..................................................................................................1 1.1 OVERVIEW ....................................................................................................................................... 1 1.2 TP400 FEATURES............................................................................................................................ 2 1.3 PC/AT COMPATIBILITY...................................................................
4 STAND-ALONE OPERATION AND EXPANSION BUSES...............................40 4.1 STAND-ALONE OPERATION ........................................................................................................ 40 4.2 PC/104 BUS .................................................................................................................................... 40 4.3 PC/104-PLUS BUS ...........................................................................................................................
APPENDIX A: SPECIFICATION............................................................................... A1 APPENDIX B: TP400 SET-UP PROCEDURE. ........................................................ B1 B.1 PROCESSOR COOLING................................................................................................................B1 B.2 SDRAM CONFIGURATION ............................................................................................................B1 B.3 SOLDER LINK AREAS................
APPENDIX F: TFTIF FLAT PANEL INTERFACE BOARDS ...................................... F1 F.1 F.2 F.3 F.4 F.5 F.6 F.7 INTRODUCTION............................................................................................................................. F1 INSTALLATION............................................................................................................................... F2 CABLE LENGTHS..................................................................................................
TABLES TABLE 1 - TP400 PERFORMANCE RATINGS.........................................................................................14 TABLE 2 - TP400 ADDRESS MAP - FIRST 1M BYTE.............................................................................18 TABLE 3 - ON-BOARD I/O DEVICES.......................................................................................................20 TABLE 4 - SDRAM ALLOCATED TO DISPLAY CONTROLLER ............................................................
FIGURES FIGURE 1 - TP400 BLOCK DIAGRAM ....................................................................................................... 6 FIGURE 2 - RECOMMENDED BATTERY BACK-UP CIRCUIT .............................................................. 26 FIGURE C1 FIGURE C2 FIGURE C3 FIGURE C4 FIGURE C5 FIGURE C6 - MAIN BOARD TOP COMPONENT PLACEMENT ............................................................C2 MAIN BOARD BOTTOM COMPONENT PLACEMENT....................................................
1 INTRODUCTION 1.1 OVERVIEW To maintain our lead in advanced and highly integrated PC compatible computers, DSP Design have released a very highly integrated, high performance processor board compliant with the PC/104-Plus V1.1 specification. The board has been specially designed to allow low power operation. This processor card is fitted with the National Semiconductor Geode GX1 high integration processor chip set, which operates at up to 300MHz.
1.2 2 TP400 FEATURES • High integration processor: a Geode GX1 processor is fitted, running at up to 300MHz. • PC/104 V2.3 16-bit bus interface for wide compatibility. • PC/104-Plus connector is fitted to allow PCI expansion cards to be used. • Floppy and IDE disk controllers. • Four serial ports - three are RS-232 compatible and one provides TTL level signals only. COM2 is user-configurable as RS-485.
1.3 • Powered by a single 5V supply. A switched mode power supply is provided to efficiently produce 2.2V and 3.3V for the processor and memory that require these voltages. • Millennium compliant AT compatible calendar/clock chip uses external battery. • A 512-byte size serial EEPROM is provided to retain set-up parameters in the absence of an external battery. Space is also available for user data. • Reset, power supply monitor and watchdog timer circuitry.
1.4 PC/104-PLUS AS A PC EXPANSION BUS Users can operate the TP400 as a single board computer. If expansion is required I/O boards can be accessed via the PC/104 and PC/104-Plus interfaces provided on the TP400. The PC/104 bus is a compact version of the IEEE P996 (PC and PC/AT) bus, optimized for embedded systems applications.
The audio processor logic in the CS5530A chip connects to an AC97 compatible audio codec chip, which provides audio A/D and D/A conversions. The CS5530A also provides a slower PC/104 bus (ISA bus), on which the Flash memory and Super I/O chips are located. The Super I/O chip includes the floppy and IDE disk controllers, serial and parallel I/O functions as well as the keyboard and mouse controller. A second dual UART chip implements COM3 and COM4.
+5V PCI Bus Video + Graphics POWER SUPPLY SDRAM Geode GX1 2.0V CLOCK GEN. 3.3V J3 PC/104-PLUS J10 IDE J9 USB J8 TFT 5530A CRT J6 CRT AC97 CODEC AUDIO A/D A/D J7 PANELLINK PANELLINK Utility Register SPKR E2PROM + RESET ETHERNET J106 ETHERNET FLASH J1/J2 PC/104 J5 RS232 COM3 UARTS COM4 SPKR J4 SPEAKER RS232 COM1 RS232 / RS485 COM2 PRN SUPER I/O KBD MOUSE IRDA BATT J10 FLOPPY FIGURE 1 - TP400 BLOCK DIAGRAM 6 158004.
1.6 GETTING STARTED QUICKLY This manual gives all of the information that most users will need in order to operate the TP400. This section gives a quick introduction to getting started. More details on configuring the board are given in Appendix B: TP400 Setup Procedure. Those people who have special requirements may require further information. If this is the case our support engineers will be pleased to help you, but please read the manual first. As well as reading this section, please read section 1.
TCDEVPLUS (but not the TCDEV) also includes 14-way ribbon cable connects to the TP400 J5 connector, making connections for COM3 and COM4. The TP400 includes its own VGA, floppy and IDE disk controllers, and VGA, floppy and IDE disk controllers are also present on the TCDEVPLUS. It is possible to use either the VGA and disk controllers on the TP400 or the controllers on the TCDEVPLUS (though not a mixture of both).
before or during the memory test to enter the Setup program, where you can change the time and date and make other changes. The "EXIT" menu option allows you to save the settings in CMOS RAM and exit. While using the TCDEVPLUS’s floppy disk controller the BIOS will print a warning message to the effect that it is disabling the floppy disk controller on board the TP400. You should now boot DOS from the floppy disk drive on the TCDEVPLUS.
A fan or heatsink should be added to the TP400, as it may get too hot without one. A heatsink is supplied as part of the TP400PAK starter pack (see Appendix D for details). Enable the floppy disk controller and VGA graphics on the TCDEV. This is done by setting the jumpers at jumper areas E3 and E5 to the "EN" position. Disable the IDE disk controller on the TCDEVPLUS by setting jumper E4 to the “DIS” position. Ensure there are jumpers between positions 1 and 12, and between 4 and 9 at jumper area E1.
Section 3.9 has more details on the IDE interface. A Flash File system is also provided with the TP400. Section 6.6 has details of the Flash File System. When you want to use the TP400’s on-board floppy and graphics controllers then you may make the appropriate connections to the TP400’s connectors and disable the corresponding TP400 device at the TCDEV jumper areas E3 and E5. To disable the TCDEV’s VGA chip you must also set the E6 jumpers all to the "DIS" position.
1.7 AVOIDING COMMON PROBLEMS This section draws your attention to a number of issues that can cause problems, but that can be avoided if you are aware of them. The battery pin must not be connected to +5V and must not be left floating. See section 3.6 for further details. Some old disk drives and some Compact Flash cards do not report their parameters and so the parameters will need to be set manually for these devices. See section 3.9 for further details.
2 PROCESSOR AND MEMORY The TP400 single board computer is based around the National Semiconductor Geode GX1 chip set. There is one SODIMM SDRAM socket. The standard TP400 is supplied without memory, allowing you to choose memory to suit your application. SDRAM options are detailed in Appendix D, Options and Ordering Information. 2.1 PROCESSOR The TP400 is based on the National Semiconductor Geode GX1 chip set.
(ball grid array) device on the main printed circuit board. The CS5530A contains graphics processing logic, the IDE and USB ports, clock generators, ISA bus interface and the peripheral devices traditionally implemented in a motherboard chip set. (Earlier versions of the TP400 used the CX5530A, which has the same functionality).
The above measurements were made with a 4-chip 32M-byte SODIMM module installed. The power consumption figures were taken after DOS had booted and the processor was sitting idle at the DOS prompt. Power management was disabled. Users should make their own decision concerning cooling of the processor. The TP400 draws very little power, considering its level of performance, but is still likely to need cooling.
2.3 SDRAM The main memory of the TP400 consists of Synchronous Dynamic RAM (SDRAM) chips. The chips are mounted on a small 144-pin printed circuit board called a SODIMM module (small outline dual-in-line memory module). The memory is 64-bits wide. Four options are available: • • • • 32M bytes 64M bytes 128M bytes 256M bytes The standard configuration of the TP400 is to have no SDRAM fitted. SODIMM modules must be ordered separately and fitted into the SODIMM socket on the TP400.
2.4 FLASH MEMORY By default the TP400 is fitted with one 2M-byte AMD or Fujitsu 29F016 Flash memory chip. However, the TP400 has sites for two flash chips, and the 4M byte 29F032 can be fitted as an alternative to the 29F016. Thus there are options for 4M or 8M bytes of Flash memory as well as the standard 2M-byte complement. The 4M and 8M byte options are available by special order and are subject to a minimum order quantity.
executed from the 32-bit wide SDRAM, much faster than it would be from the Flash chip. Section 6.3 contains further information on BIOS extensions. 2.5 MEMORY ADDRESS MAP Table 2 shows the memory map as configured by the standard BIOS of the TP400. This table shows the bottom 1M byte address space. Extra SDRAM is located immediately above the 1M byte boundary. Memory accesses beyond the top of the SDRAM are performed on the PCI bus.
3 PERIPHERALS This section describes the I/O address map and the on-board peripherals. 3.1 I/O ADDRESS MAP The TP400 features a number of on-board I/O mapped resources, and supports access to the PC/104 bus I/O space as well. All I/O mapped functions that are present on desktop PCs are present at the same I/O addresses on the TP400. The TP400 is therefore compatible at the machine code or register level with desktop PCs.
ADDRESS I/O FUNCTION 00 - 0F 20 - 21 DMA Controller in Geode GX1 Interrupt controller in Geode GX1 22 - 23 Geode GX1 Processor Configuration Registers 2E - 2F Super I/O Chip Configuration Registers 40 - 43 Timer Unit in Geode GX1 60 and 64 Keyboard controller in Super I/O chip. 61 Port B Control/Status Port in Geode GX1 70 - 71 80 - 8F Real-Time Clock in Super I/O chip and NMI enable in Geode GX1.
3.2 SUPER I/O CHIP Many of the peripheral functions are implemented in a single chip, the "Super I/O" chip. This is the PC97317 from national Semiconductor. The following functions are included in the PC97317: • • • • • • Two serial ports (operating as COM2 and COM3). A printer port. A keyboard controller (providing a PS/2 mouse as well as the keyboard) A floppy disk controller. A real time clock with CMOS SRAM. Several general-purpose I/O bits, used on the TP400 as the "Utility Register".
Connection is made to the COM3 and COM4 serial ports via the 14-way J5 connector. The pin assignments of the first three serial ports are such that they easily connect to 9-pin D-type connectors. The first three serial ports provide the full complement of RS-232 signals. Transmit Data, Request To Send (RTS) and Data Terminal Ready (DTR) are outputs from the TP400. Receive Data, Data Carrier Detect (DCD), Data Set Ready (DSR), Clear to Send (CTS) and Ring Indicator (RI) are inputs to the TP400.
In RS-485 mode the DTR control output has no effect, and the CTS, DCD, DSR and RI status inputs are undefined (they can be in either state, and software must not assume any particular values of these signals). No RS-485 termination resistors are provided on the TP400. These must be provided externally if required. When operating as an RS-485 port the COM2 RS-232 signals on connector J4 are re-assigned. Appendix E provides information on RS-485 pin assignments. 3.4.
The polarity of the incoming signal on the IRRX pin is of opposite polarity to that on the IRTX pin. The IRTX pin is normally low, and will emit a series of narrow positive going pulses as a character is transmitted. These positive pulses are designed to switch on the LED of the IrDA transmitter. For proper operation the IRRX receiver must deliver to the Super I/O chip a signal that is normally high, but which pulses low on receipt of a pulse of light from an IrDA transmitter.
The printer port can optionally be configured as an output-only port, an Enhanced Parallel Port (EPP) and as an Extended Capabilities Printer Port (ECP). In EPP mode greater throughput is provided by automatically generating strobe signals. In ECP mode a 16-byte FIFO is provided. Users must provide their own software for these modes. The parallel port mode can be set with the BIOS Setup program (use the Advanced / I/O Device Configuration). The port can also be disabled using this Setup program.
is present then the battery pin on the J3 connector must be connected to GND, to prevent it floating. The battery pin is called BATT and is pin 28. A ground pin exists on the adjacent pin, pin 27. The calendar/clock circuitry draws approximately 2uA from the battery when the TP400 is powered down and draws no current when operating normally (i.e. powered up). The TCDEVPLUS has a 3.6V NiMH rechargeable battery installed.
The keyboard controller circuitry on the TP400 is contained within the Super I/O chip, and also includes a PS/2 style mouse port. The keyboard uses the IRQ1 interrupt line and the mouse uses IRQ12. Connections to the keyboard and mouse are made through the 50-way J4 connector. On the TCDEVPLUS these are routed to two PS/2 style connectors (6-pin mini-DIN connectors). On the TCDEV the keyboard connector is a 5-pin DIN connector and the mouse connector is a 6-pin mini-DIN connector. 3.
In addition, the "Ultra DMA/33", or "UDMA" Mode allows even higher data transfers by transferring two words on every data transfer cycle, and using DMA. UDMA however requires an operating-system specific device driver. Suitable device drivers are available for the Windows 95/98 and Windows NT operating systems and are included on the TP400 Utility Disks. IDE disk drives can be connected through the 44-pin 2mm-pitch connector, J100.
ROM drives, and a Compact Flash socket to allow the use of Compact Flash cards in place of mechanical hard disk drives. Users will probably prefer to use the TP400’s IDE controller rather than the TCDEVPLUS’s IDE controllers while using the TCDEVPLUS, since it is faster than the TCDEVPLUS IDE controller. However, the TCDEVPLUS IDE controller may be used. To do this the TCDEVPLUS IDE controller must be enabled at jumper area E4. In addition, the IDE disk controllers on the TP400 must be disabled.
CS5530A for formatting and dispatch to the CRT or flat panel. The CS5530A contains the RAMDAC for the analog CRT displays. In order to minimise the amount of memory bandwidth taken up by the refreshing of the displays, the Geode GX1 incorporates data compression circuitry. Thus in normal operation only the compressed representation of the graphics image needs to be read from the SDRAM.
RESOLUTION 640 X 480 SIMULTANEOUS COLOURS 8 BPP. 256 colours out of a palette of 256. 16 BPP. 64k colours 5-6-5. 800 x 600 8 BPP. 256 colours out of a palette of 256. 16 BPP. 64k colours 5-6-5. 1024 x 768 8 BPP. 256 colours out of a palette of 256. 16 BPP. 64k colours 5-6-5. 1280 X 1024 8 BPP. 256 colours out of a palette of 256. REFRESH RATE DOTCLK RATE 72Hz 75Hz 60Hz 72Hz 75Hz 60Hz 72Hz 75Hz 60Hz 72Hz 75Hz 60Hz 72Hz 75Hz 60Hz 72Hz 75Hz 60Hz 75Hz 31.5MHz 31.5MHz 25.175MHz 31.5MHz 31.5MHz 40.
external graphics adapter is defined by the BIOS Setup program (Advanced / Advanced Chipset Control / Multiple Monitor Support menu). It is also possible to disable the internal graphics controller, and operate the TP400 without any graphics controller at all. This is done in the Advanced / Advanced Chipset Control menu. 3.10.4 Native Display Drivers Native display drivers will give better performance than treating the display controller as a VGA device.
3.10.6 PanelLink The TP400 includes a PanelLink transmitter chip, which can be used to drive displays located at up to 10 meters from the TP400. PanelLink is a technology which converts the digital signals normally sent to a TFT LCD into four high-speed serial data streams which can be transmitted over four twisted pair cables. PanelLink was invented by Silicon Image, and has been adopted by the DVI (Digital Visual Interface) consortium for use with digital monitors.
3.11 VIDEO PLAYBACK The Geode GX1 architecture provides hardware support for the playback of video recordings. This substantially improves the picture quality and playback frames per second when decoding MPEG and other video files. Video playback logic present within the Geode GX1 chip set includes colour-space conversion logic, scaling hardware, X/Y video filters, overlay colour-key and gamma correction.
3.14 USB PORTS The TP400 provides two USB ports. USB stands for Universal Serial Bus, and is designed to rationalise connections on PCs by providing a single port that is able to connect to a wide range of peripherals: keyboards and mice, printers and modems, scanners, video cameras and data acquisition systems, to name a few. Access to the USB ports on the TP400 is through the eight-way connector J9.
BIOS during the POST process, following reset. It is both I/O and memory mapped and uses one interrupt. The memory and I/O addresses, and the interrupt, are allocated by the Plug and Play BIOS so as to avoid clashes with other resources. The chip is typically configured to use 256 bytes at I/O address 0ff80h, 4k bytes at memory address 0fedff000h and IRQ10. The chip can act as a PCI bus master, for fast and efficient transfer of data across the PCI bus.
the A/D chip can be driven from an external voltage source, or from the on-board VCC supply voltage. A solder link allows this selection to be made. The accuracy of the measurement of course will be limited by the accuracy of the VREF voltage. Measurements can be made as “single-ended” or “differential” measurements, as programmable options. In single-ended mode each of the four inputs are measured with respect to the AGND (0V) pin. (AGND is connected to the digital GND at a single point on the TP400).
3.17 SERIAL EEPROM The TP400 has a serial EEPROM chip fitted. This is used primarily to store set-up parameters in systems that lack a battery to retain configuration data in the CMOS SRAM. There is some space available in the serial EEPROM for users’ data. The serial EEPROM chip also contains the watchdog timer, which is also accessed through the EEPROM's serial interface. See section 6.7 and 6.8 for information on using the serial EEPROM utility programs. See section 5.
PORT E0h E0h E0h E0h E0h E0h E0h E0h E4h E4h E4h E4h E4h E4h E4h E4h E4h BIT 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 7* FUNCTION BA14 (For Flash memory bank switching) BA15 (For Flash memory bank switching) BA16 (For Flash memory bank switching) BA17 (For Flash memory bank switching) BA18 (For Flash memory bank switching) BA19 (For Flash memory bank switching) (not used) BA20 (For Flash memory bank switching) BA21 (For Flash memory bank switching) /ENFLASH (Enables access to the Flash memory chips when 0) (not us
4 STAND-ALONE OPERATION AND EXPANSION BUSES The TP400 will operate as a stand-alone single board computer, or it can use the PC/104 bus interface to expand its capabilities with the wide range of PC/104 bus I/O cards currently available. The PC/104-Plus bus allows for expansion using high speed PCI chips. This section of the manual describes first the stand alone operation and then operation on the PC/104 and PC/104-Plus buses. 4.
Pull up resistors of 10k ohms have been added to the SD0 - SD15 data bus signals. The IOCHRDY, /IOCS16, /MEMCS16 and /ZEROWS signals have 330 ohm pull up resistors. There are 4K7 pull-up resistors on all IRQ signals on the PC/104 bus and also on the /IOCHCHK pin. The DREQ signals have 4K7 pull-down resistors. The TP400 is PC/104 compliant. That is, the TP400 conforms to both the electrical and mechanical specifications laid down by the PC/104 V2.3 document.
not 5V tolerant. This means that the TP400 cannot be used with PC/104-Plus or PCI boards which have 5V signal levels. It will operate with 3.3V boards and with boards which support either 3.3V or 5V operation. The TCVIDEO video capture board from DSP Design can be used with the TP400. The TP400’s VI/O power supply pins are configured to be at 3.3V. Most of the PCI bus signals are bussed to all PCI boards in the system. Some signals however are unique to each board.
4.4 PC/104 AND PC/104-Plus CLOCK AND RESET SIGNALS 4.4.1 PC/104 Clock and Reset Signals Two PC/104 clocks are provided: the bus clock (BUSCLK) and an oscillator (OSC). The BUSCLK runs at 8.33MHz. The OSC signal is a clock running at 14.3181MHz. The TP400 can reset the PC/104 bus. See section 5 for details. The TP400 drives the PC bus RESETDRV signal but cannot be reset by the RESETDRV signal. The TP400 can be reset by issuing a low going pulse on the /RESET line of the J4 connector.
4.5 INTERRUPTS The Geode GX1 chip set contains the same interrupt controller circuit as is present on all PC computers. This consists of two 8259 type interrupt circuits, each with eight interrupt inputs. One 8259 is connected in cascade with the other, leaving 15 interrupts available. Some of these 15 interrupts are used internally to the Geode GX1 chip set. Other interrupts are connected to on-board peripherals (serial ports and disk controllers for example). Further interrupts can come from the PCI bus.
PC IRQ 0 1 INTERNAL/ EXTERNAL Internal On-Board 2 3 4 5 Internal On-Board On-Board On-Board N/A Yes Yes Yes (SoundBlaster) No Yes Yes Yes 6 7 On-Board On-Board Yes Yes Yes Yes 8 On-Board Yes No 9 10 No No Yes Yes No, except PnP is aware of USB Yes 12 13 On-Board Internal (normally) Internal (USB) or External (no USB) On-Board Internal Yes Yes Yes No 14 15 On-Board External Yes No Yes Yes 11 PnP AWARE? Yes Yes PC/104 BUS? No No ALLOCATION Timer Keyboard in PC97317 Super I/O chip
The PCI bus interrupts are active-low level-sensitive interrupts. In principle, several cards can drive the same INTx# pin low, and one board may drive more than one interrupt line. In practice, few boards drive more than one INTx# line, and a rotation of the INTx# pins from one slot to the next ensures that if each of four boards drive their INTA# pin, the TP400 will see one interrupt on each of INTA#, INTB#, INTC# and INTD#. Table 8 lists the interrupt pin allocation for each PC/104-Plus slot.
Ethernet controllers and to PCI boards. The Advanced / Audio Options menu allows the SoundBlaster audio sub-system to be disabled, or its interrupt to be changed. 4.6 DMA The Geode GX1 processor contains the same DMA controller circuit as is present on all PC computers. This consists of two 8237 type interrupt circuits, each with four DMA Request (DREQ) inputs and four DMA acknowledge (DACK) outputs. One 8237 is connected in cascade with the other, leaving seven DMA channels available.
5 HARDWARE RESET OPTIONS A full set of hardware reset options exist for the TP400. The reset circuit is built around the X5043 serial EEPROM chip, which provides reset functions as well as memory. This chip includes a power supply monitor and a watchdog timer. To avoid glitches on the reset signal, the X5043 will always hold the reset signal asserted for approximately 200ms. This ensures all circuitry is properly reset, and conforms to the PC/104 bus specification.
Disks has documented sample code illustrating the use of the watchdog function, and also includes the data sheet of the X5043. Note that it is the responsibility of the user to design code that will reliably kick the watchdog timer. The BIOS includes code that disables the watchdog timer immediately after a reset, and thus if a watchdog time-out occurs the watchdog timer is disabled until after the operating system is loaded and the application software re-enables it. See section 6.
6 SOFTWARE The TP400 offers a very high degree of PC compatibility. The vast majority of software (both operating systems and applications software) that will run on a conventional PC will also run satisfactorily on the TP400. Most users will wish to use the MS-DOS or Windows operating systems (booting from a hard disk, floppy disk or Flash File System) and then run off-the-shelf software, or their own application.
6.2.1 Operation of the Setup Program The Setup program is menu driven, and its operation should be self-explanatory. Users are advised not to change parameters that they do not understand. Setup parameters are stored in the on-board CMOS memory, and it is backed-up if an external battery is provided. If no external battery is present then the Setup parameters can be stored in an on-board serial EEPROM, as described in section 6.7.
6.2.2 Reducing Boot Time In later versions of the BIOS options will exist within the Setup program to greatly reduce the amount of time the BIOS spends testing the hardware prior to booting the operating system. This will result in a reduction in time between resetting the TP400 and running your application. At the same time, messages printed on the screen by the BIOS can be reduced. The current version of the BIOS there is one option that affects the boot time.
There is a special case relating to VGA BIOS extensions. Before the TP400 BIOS installs a VGA BIOS for the on-board graphics logic from within the Flash chip it first examines the PC/104 and PC/104-Plus buses, looking for any other VGA BIOS that may be present.
Any other operating system that will run on a 386, 486 or Pentium-based desktop computer should also run on the TP400. For example Windows 3.x, Windows 95, Windows 98, Windows NT, Windows NTE, and Windows CE 3.0 run successfully on the TP400. A number of other operating systems work well with the TP300. These include Linux, QNX and VxWorks. Contact DSP Design if you are interested in these operating systems.
In the safe BIOS programming mode TP3F016 is run with the following single parameter: TP3F016 -u -u -u (u for ’update BIOS’). Program the specified BIOS image file into the device. In this safe mode the program checks to see if the file is present on the disk, and is a plausible BIOS image (i.e. it is 256k bytes in size). The program then erases the top 256k bytes in the Flash memory, and programs and verifies the file.
The TP3F016.EXE program can be used to write one or more files to the Flash chip, by running the program several times with different -p, -s and -o options each time. 6.5.2 Programming the 4M byte 29F032 Flash Chips. The following describes the process of programming the AMD or Fujitsu 29F032 chip if that is what is installed on your TP400. The 29F032 flash device is arranged as 64 sectors of 64k bytes each. Each sector is erased separately, and it is not possible to erase less than 64k bytes at a time.
or the number of bytes specified by this parameter, whichever is the smaller. This parameter defaults to the size of the Flash device (400000h bytes in the case of the 29F032). -q Quiet. This parameter minimizes screen output. The default is “not quiet”. -d -dxxxxxx. This option displays the contents of the Flash chip at the 22-bit (6 hex digit) hexadecimal address xxxxxx. The output is 16 lines each of 16 hex bytes. The default is not to print data. -c -cx.
these operating systems. This situation may change in the future, so contact us if you have an interest in these operating systems. 6.6.1 Overview The ability to operate without mechanical disk drives is a key feature of the TP400. To do this you can make use of the Flash File System (FFS) that is provided with every TP400. As well as being more robust than mechanical drives they are also faster, at least for read operations. The FFS provided with the TP400 is the FlashFX product from Datalight Inc.
Windows 95 users will want to use the Flash File System, so these users should disable the Flash File System BIOS extension using the BIOS Setup program. 6.6.2 Operation of the Flash File System The standard TP400 is shipped from DSP Design with the FFS BIOS Extension installed in the Flash memory, and the Flash disk already formatted. Thus most of this section is for information only, as steps 2 - 5 below have already been performed.
5 Now the DEVICE=FTP3AMD.SYS entry should be removed from the CONFIG.SYS file on the boot disk. Note that the FTP3AMD.SYS device driver is only used for formatting the Flash File System. 6 Once the Flash disk has been formatted the user can use the DOS SYS command to place DOS on the Flash disk. (Note this step is optional, but the operating system must be added if the Flash disk is to be the boot disk).
FXRECLM.EXE usage: FXRECLM.EXE [] Where is the drive letter of the flash disk (e.g. C: ), and is the number of successive garbage collection operations to perform on the flash disk. One garbage collection operation will reclaim one 64k sector of flash memory. The FXRECLM.EXE utility stops the garbage collection process either when has been reached or when there is no more flash memory to recover, whichever comes first.
6.7 SAVING CMOS RAM DATA IN THE SERIAL EEPROM A serial EEPROM chip on the TP400 provides non-volatile memory storage and also incorporates a watchdog timer. The non-volatile memory can be used to back-up the CMOS SRAM, in systems without batteries, or where the battery may go flat. The serial EEPROM chip used is the Xicor X5043. This chip contains 512 bytes of nonvolatile serial EEPROM. The serial EEPROM is accessed through the Utility Register in the PC97317 Super I/O chip.
6.8 SERIAL EEPROM PROGRAMMING The X5043 serial EEPROM has 512 (200h) bytes on non-volatile memory. Section 6.7 describes using the serial EEPROM for saving CMOS RAM settings. Addresses 00h - 7Fh in the serial EEPROM are reserved for holding CMOS RAM data, addresses 80h and 81h contain a checksum for the CMOS data, and addresses 82h - 0FFH are reserved for future DSP Design use. Addresses 100h - 1FFh remain available for users. The TP3EE.
-kxxx -k kicks the watchdog timer for seconds. The xxx parameter is a hexadecimal number in the range 0 - 1FFh. 6.9 WATCHDOG TIMER PROGRAMMING The watchdog timer is contained within the serial EEPROM chip and is controlled through four pins of the Utility Register. Once it is enabled, the watchdog timer will reset the TP400 if it is not accessed (or “kicked”) regularly. It is up to the user to write code to enable and kick the watchdog timer.
7 POWER MANAGEMENT The TP400 includes sophisticated power management hardware and software, which allows the power consumption of the TP400 to be reduced at times when the full performance of the board is not required. This can extend battery life in batteryoperated systems and allow for cooler operation, and thus greater product reliability. The BIOS can manage power autonomously, without intervention from higher levels of software.
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APPENDIX A: SPECIFICATION Product: TP400 Description: Highly integrated PC/104-Plus format, single board PC compatible computer. Processor: National Semiconductor Geode GX1. Clock speed of 300MHz maximum, with lower clock speeds available for power savings. (300MHz processor fitted as standard). SDRAM: 32M, 64M, 128M or 256M bytes SDRAM implemented using 144-pin SODIMM memory modules. Flash Memory: 2M byte of AMD 29F016 Flash memory.
Analog to Digital Converter: Four channel, 12-bits. External reference. 0V to +5V input range. Reset circuit: Power supply monitor, PC/104 bus reset, watchdog timer and external reset switch capability. Bus interfaces: bus). PC/104 V2.3 16-bit (ISA bus) and PC/104-Plus 32-bit (PCI Interrupts: Standard PC and PC/AT interrupts are available for on-board peripherals or the PC/104 bus: (IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, IRQ9, IRQ10, IRQ11, IRQ12, IRQ14 and IRQ15).
APPENDIX B: TP400 SET-UP PROCEDURE. This appendix describes fitting SDRAM to the TP400, and solder link settings. The component placement diagrams in Appendix C may be of help in locating the solder links referred to in this appendix. A number of functions can be configured with solder links on the TP400 board. The board layout is so dense we have implemented these configuration options with solder links that take less space than jumpers, as well as being more reliable.
B.3 SOLDER LINK AREAS A number of functions can be configured with solder links on the TP400 board. The board layout is so dense we have implemented these configuration options with solder links that take less space than jumpers, as well as being more reliable. Care must be taken when changing these link areas so that no accidental shorts are produced or created. Default settings are noted below. Two versions of the TP400 have been shipped. The Rev B board has two additional solder links.
LK8 ADC1 or LINE_IN_L This link determines whether Connector J6 pin 4 is used for the analog to digital convertor channel 1 input, or the audio codec Line In Left input. Pin 4 is A/D convertor ADC1: Pin 4 is audio codec Line In Left input: LK9 Fit link Omit link (default) ADC2 or LINE_OUT_R This link determines whether Connector J6 pin 6 is used for the analog to digital convertor channel 2 input, or the audio codec Line Out Right output.
LK14 VREF or Microphone This link determines whether Connector J6 pin 1 is used for the analog to digital convertor VREF input or output, or the audio codec microphone input. See also LK6. Pin 1 is A/D convertor VREF: Pin 1 is audio codec microphone input: Omit Link. Fit link (default) LK15 COM2 RS-232/RS-485 Selection This link is used to select whether COM2 is RS-232 or RS-485. RS-232: RS-485: No link installed. (Default setting) Link installed.
LK20 PanelLink Power This link is only present on the Rev B TP400 PCB. It is used to route either 3.3V or 5V to the 10-way PanelLink connector. 3.3V to J7: 5V to J7: LK100 - LK102 Link 1 – 2 (Default) Link 2 - 3 Processor Clock Speed These three pins set the Geode GX1 processor clock speed. They are normally factory set and need not be changed. However, users may want to reduce the processor clock speed to reduce power consumption.
LK104 - LK107 Vcore Voltage Selection. These links are set to select the Vcore voltage for the Geode processor. The Vcore voltage can be chosen to match the processor and the clock frequency. PROCESSOR GXm CLOCK 266MHz VCORE 2.9V LK104 2-3 Geode GXLV Geode GX1 Geode GX1 Geode GX1 200MHz 300MHz 266MHz 200MHz 2.2V 2.0V 1.8V 1.
LK113 SDRAM Clock Feedback These links are set according to the processor fitted. Geode GX1 Geode GXm Link 1 - 3 (Default) Link 1 - 2 and 3 - 4 LK114 IDE /PDIAG Pin This link is only present on the Rev B TP400 PCB. It allows pin 34 of the IDE connector J100 to be connected to GND or to be unconnected. By default it is connected to GND, which is equivalent to the connection on the Rev A board. Connect /PDIAG pin to GND: /PDIAG is not connected; 158004.
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APPENDIX C: MECHANICAL DRAWINGS AND SCHEMATICS The four component placement diagrams that follow may be of help in locating the components referred to in Appendix B. There is one diagram for each side of the two printer circuit boards that make up the TP400. This Appendix includes mechanical drawings of the TP400, showing the position of pin 1 of each connector. The drawings are of the REV B00 version of the TP400.
FIGURE C1 - MAIN BOARD TOP COMPONENT PLACEMENT C2 158004.
FIGURE C2 - MAIN BOARD BOTTOM COMPONENT PLACEMENT 158004.
FIGURE C3 - DAUGHTER BOARD TOP COMPONENT PLACEMENT C4 158004.
FIGURE C4 - DAUGHTER BOARD BOTTOM COMPONENT PLACEMENT 158004.
FIGURE C5 - MAIN BOARD MECHANICAL DIMENSIONS C6 158004.
FIGURE C6 - DAUGHTER BOARD MECHANICAL DIMENSIONS 158004.
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APPENDIX D: OPTIONS AND ORDERING INFORMATION This Appendix lists some of the range of PC/104 products available from DSP Design, and in particular the products related to the TP400. Note that as new products are being released all the time this list may not be complete. Contact DSP Design for a full price list. D.1 PROCESSOR BOARDS Table D1 lists the processor options (only one at this time). ITEM TP400 DESCRIPTION Standard TP400 processor board, with 300MHz processor and without SDRAM.
D.3 TP400 PROCESSOR STARTER PACK The best way of starting a TP400 development project is to buy a TP400PAK, which is one of a family of “PAK” products. Each “PAK” product includes the processor itself, the TCDEVPLUS Development System board, a TPPSU power supply and a comprehensive set of manuals, disks, cable assemblies optimized to that particular processor.
D.4 PC/104 I/O BOARDS The following list describes a selection of the PC/104 bus cards that are available from DSP Design. Contact DSP Design for the latest list. ITEM TADIO12 TPO24 TP406 TS400 TSYST TCBLASTER TCVIDEO TCM3115B TCMDM336 TCMM32 DESCRIPTION Analog and digital I/O board. 16 12-bit A/D inputs, 2 12-bit D/A outputs, 20 digital I/O lines. Opto-isolated I/O board. Twelve inputs and twelve outputs Parallel I/O and timer board.
D.5 ACCESSORIES Table D5 lists some or all of the following items may be of use during your development process. Some of the items are included in the TP400PAK product. ITEM DESCRIPTION TP400PAK Starter pack for TP400. See section D.3 for full details. The individual items in Table D3 can also be ordered separately. Set of floppy disks containing BIOSes and support software. Technical Reference Manual for TP400.
D.6 CF100 COMPACT FLASH IDE Compact Flash cards are a useful alternative to IDE drives and floppy disks during development. The are reasonably high capacity, and if you equip your PC with the CFREADER product you are able to transfer files between your development machine and the TCDEVPLUS. The CFREADER is a Compact Flash reader/writer unit that plugs into the printer port of a PC. The Compact Flash card market is evolving rapidly.
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APPENDIX E: CONNECTOR PIN ASSIGNMENTS This Appendix describes the connectors used on the TP400. E.1 SUMMARY OF CONNECTORS Table E1 and E2 lists the connectors on the TP400 main board and daughter board respectively. The tables describe the type of the connectors and their functions. Note that the right angle pin headers (J4, J5 and J6) could be fitted with alternative connectors in order to facilitate plugging the TP400 into a motherboard.
E.2 EXPANSION BUS CONNECTORS The PC/104 bus connectors J1 and J2 provide the ISA bus compatible signals. They have pin assignments that conform to the PC/104 bus specification V2.3. The pin assignments for these connectors are shown in Table E4 and E3 respectively. The PC/104-Plus connector J3 provides the PCI compatible signals. The pin assignments for this connector are shown in Table E5.
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 J1 ROW A /IOCHCHK *, ** SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 IOCHRDY AEN SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 0V J1 ROW B 0V RESETDRV +5V IRQ9 -5V * DRQ2 -12V * /ZEROWS +12V * (KEY) /SMEMW /SMEMR /IOWR /IORD /DACK3 DRQ3 /DACK1 DRQ1 /REFRESH *, ** BUSCLK IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 /DACK2 TC ALE +5V OSC 0V 0V NOTES: * These connections are not implemented on the TP400.
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 J3 ROW A GND/5V KEY VI/O (+5V) AD05 C/BE0# GND AD11 AD14 +3.3V SERR* GND STOP* +3.3V FRAME# GND AD18 AD21 +3.3V IDSEL0 (AD20) AD24 GND AD29 +5V REQ0# GND GNT1# +5V CLK2 GND +12V *** -12V *** NOTES: J3 ROW B N/C Reserved AD02 GND AD07 AD09 VI/O (+5V) AD13 C/BE1# GND PERR# +3.3V TRDY# GND AD16 +3.
E.3 TP400 PERIPHERAL CONNECTOR Many peripheral devices are connected to the TP400 through a 50 way IDC connector, called J4. The 50 pins on the connector are brought to the outside world through a 50-way 0.1 inch IDC right angled connector. The J4 connector pin assignments are almost identical on all DSP Design PC/104 processor boards. The TP400 pin assignments are identical to the TB486, TC586 and TX486 pin assignments.
J4 PIN SIGNAL 1 3 5 7 9 11 13 15 17 19 21 23 IRRX MCLOCK SLCT BUSY PD7 PD5 GND /SLCTIN /INIT /ERROR /AUTOFD GND 25 27 29 31 33 35 VCC GND VCC GND GND DTR2 or RS485 ** TXD2 or RS485 ** RXD2 DCD2 RI1 CTS1 RTS1 DSR1 37 39 41 43 45 47 49 PERIPHERAL NAME PIN 5 13 11 9 7 * 17 16 15 14 J4 PIN SIGNAL 2 4 6 8 10 12 14 16 18 20 22 24 IRTX MDATA PE /ACK PD6 PD4 PD3 PD2 PD1 PD0 /STROBE /RESET SPKR BATT KBDATA KBCLK RI2 CTS2 or RS485 ** RTS2 or RS485 ** DSR2 GND DTR1 TXD1 RXD1 DCD1 IrDA MOUSE PRINTER PRINTE
E.4 COM3, COM4 SERIAL PORT CONNECTOR Connector J5 is a 14-way pin header adjacent to J4. It carries the COM3 and COM4 serial port signals. The signals are arranged so that a ribbon cable from J5 can easily crimp onto a 9-pin IDC D-type connector for COM3. Pin 1 of the J5 connector can be identified by looking at the J5 silk-screen box that surrounds the J5 connector on the TP400. A “2” is located close to the pin 1 end of J5 and a “13” is placed close to the pin 14 end.
PIN 1 3 5 7 9 11 13 15 SIGNAL (AUDIO) MIC IN ADCGND ADCGND ADCGND SUS_RES GREEN AGND VSYNC SIGNAL (A/D) VREF ADCGND ADCGND ADCGND SUS_RES GREEN AGND VSYNC VGA PIN 2 6, 7, 8 14 PIN 2 4 6 8 10 12 14 16 SIGNAL (AUDIO) LINE_IN_R LINE_IN_L LINE_OUT_R LINE_OUT_L RED BLUE HSYNC GND SIGNAL (A/D) ADC0 ADC1 ADC2 ADC3 RED BLUE HSYNC GND VGA PIN 1 3 13 5, 10 TABLE E9 - J6 VGA AND A/D CONNECTOR PIN ASSIGNMENTS E.6 PanelLink CONNECTOR Connector J7 is SIL header.
E.7 FLAT PANEL CONNECTOR The flat panel display is connected through J8, a straight 0.05” pitch 40-way pin header. Pin assignments are shown in Table E11. Table E12 describes the functions of the signals. The LCD panel signal names and may vary from panel to panel, however the signal descriptions should remain virtually the same. Use Tables E11 and E12 to help you create an interface cable to connect between the TP400 and your flat panel.
SIGNAL NAME RED0-5 GREEN0-5 BLUE0-5 SHFCLK LCD_HSYNC LCD_VSYNC ENABLE ENAVDD ENABKL SIGNAL FUNCTION Red Display Data. RED5 is the MSB. GREEN Display Data. GREEN5 is the MSB. Blue Display data. BLUE5 is the MSB. Shift Clock. Pixel clock for flat panel displays. Flat panel horizontal sync signal. Flat panel vertical sync signal. Display Enable or composite sync signal. Power sequencing control for VDD. High to switch on power. Power control for backlight inverter. High to switch on power.
E.9 IDE CONNECTOR The IDE drive is connected through J100, a straight 2mm pitch 44-way connector. Pin assignments follow. Pin 1 of the J100 connector can be identified by looking at the silk-screen legend on the TP400 PCB. A ’1’ symbol is placed close to pin 1. All odd numbered pins are in one row and all even numbered pins are in the other row.
E.10 FLOPPY CONNECTOR The floppy disk drive can be connected through a 26-way flat flexible cable, through connector J103. Pin 26 of the J103 connector can be identified by a small "26" on the top of the plastic molding of the connector.
E.11 POWER SUPPLY AND FAN CONNECTORS Power may be brought to the TP400 through connector J101. It is useful in standalone applications. Power may be sent to an optional fan through connector J102. The power supply and fan connectors are AMP HE14 connectors. The mating types are available from AMP distributors. In the UK these can be obtained by RS, whose product codes are: 532-333 (3way), 532-349 (4way) and 532-456 (crimp pins).
E.13 INTER-BOARD CONNECTORS J104 has the same pin assignments as J10. Pins 1, 60, 61 and 120 are indicated on the PCB.
J105 has the same pin assignments as J11. Pins 1, 40 and 80 are indicated on the PCB.
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APPENDIX F: TFTIF FLAT PANEL INTERFACE BOARDS F.1 INTRODUCTION The TP400 supports TFT panels of 640 x 480, 800 x 600 and 1024 x 768 pixel resolution. A range of TFT panels from different manufacturers have been used successfully with the TP400. The TFTIFxx boards are a family of small PCBs that mount onto some TFT LCD displays. They accept LCD signals from the TP400 flat panel connector J8 via a length of high-density 40-way ribbon cable.
The TFTIF31 and TFTIF41 boards also feature a connector with the CS5530A backlight enable signal (ENABKL) on it. This signal can be sent to the backlight inverter, and used to power off the backlight when instructed to do so by the graphics controller logic. The TFTIF31 and TFTIF41 include solder links that can invert the image left to right, and top to bottom. These links used together can be used to tip the picture upside down, which can be useful to improve the viewing angle on the displays.
F.4 TFTIF CONNECTOR AND SOLDER LINKS Table F2 gives the pin assignments of the TFTIF display connector.
F.5 TFTIF41 CONNECTOR AND SOLDER LINKS Table F3 gives the pin assignments of the TFTIF41 display connector.
LK2 PIN 1 2 3 LK2 CONNECTION GND PIN 41 LCDVCC LK3 PIN 1 2 3 LK3 CONNECTION GND PIN 38 LCDVCC TABLE F4 - TFTIF41 SOLDER LINK CONNECTIONS The ENABKL signal can be taken to a backlight inverter from connector J3. J3 is a Molex 53261-0290 connector. Pin assignments are given in Table F7. ENABKL is logic 1 to turn on this inverter. F.6 TFTIF31 CONNECTOR AND SOLDER LINKS Table F5 gives the pin assignments of the TFTIF31 display connector.
Some other LCDs use pins 30 and 31 for other purposes, such as additional power supply pins. LK2 and LK3 should therefore be linked to match the requirement of each display. Table F6 lists the connections of the LK2 and LK3 pins, thus allowing suitable connections to be made. LK2 PIN 1 2 3 LK2 CONNECTION GND PIN 30 LCDVCC LK3 PIN 1 2 3 LK3 CONNECTION GND PIN 31 LCDVCC TABLE F6 - TFTIF31 SOLDER LINK CONNECTIONS The ENABLK signal can be taken to a backlight inverter from connector J3.
F.7 TFTIFS15 CONNECTOR AND SOLDER LINKS Table F9 gives the pin assignments of the TFTIFS15 display connector. The TFTIFS15 has one solder link. LK1 can be set to one of two positions. In the 1-2 position the display’s +5V power is sourced from the TP400 via the 40-way ribbon cable. In the 2-3 position the display’s +5V supply is sourced from connector J4. Because the Hosiden display may require significant current, DSP Design recommend that the display is powered via J4.
PIN LCD SIGNAL 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 GND GND RA1 RA2 RA4 GND GND GA1 GA2 GA4 GND GND BA1 BA2 BA4 GND GND RB1 RB2 RB4 GND GND GB1 GB2 GB4 GND GND BB1 BB2 BB4 GND CLK GND GND DE LCDVCC LCDVCC LCDVCC GND N/C TP400 SIGNAL P16 P18 P8 P10 P0 P2 P20 P22 P12 P14 P4 P6 SHFCLK ENABLE PIN LCD SIGNAL 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80
APPENDIX G: CF100 COMPACT FLASH IDE DRIVE G.1 INTRODUCTION The CF100 is a small add-on board for the TP400. It allows Compact Flash memory cards to be used in place of standard IDE disk drives for increased operational efficiency. Compact Flash cards have the advantage of being small, high speed, low power and very reliable. This provides a suitable industrial alternative to conventional mechanical hard disk drives.
In this configuration the CF100 extends beyond the outline of the TP400, so as not to obstruct any heatsink positioned on the Geode GX1 processor. G.2.2 Cable Connection The CF100 can be connected to the TP400 remotely, via a length of ribbon cable. The CF100 J3 male connector allows a suitable ribbon cable assembly to connect between the CF100 and the TP400 J100 male connector. This allows the CF100 to be located in any position within the length of the ribbon cable.
2 This step may be required for some cards. Some Compact Flash cards do not report their parameters and so the parameters will need to be set manually for these devices. For Compact Flash cards that do not seem to be working properly when you use the Auto Detect option, do the following. In the Main / Primary Master menu set the "type" to "User". Then set the Multisector Transfer to Disabled, the LBA to Disabled, 32-Bit I/O to Disabled and Transfer Mode to Standard.
To configure the drive as a master: Fit a link on LK1. To configure the drive as a slave: Do not fit a link on LK1. Link LK3 is always fitted. Link LK2 is not a configurable link option and should not be altered. A resistor is fitted in the LK2 position as standard. In this way for example you could use two CF100 cards. One set to Master and one to Slave. Or you could use a conventional hard drive configured as the Master and a CF100 configured as the Slave. G.
APPENDIX H: RELIABILITY This Appendix provides reliability information on the TP400. Rather than just quote a single MTBF figure, with no context and no reference to the assumptions made, DSP Designed commissioned an analysis by the reliability consultancy, Landar Bonthron Associates Ltd. Their report forms the basis of this Appendix. Users interested in the reliability of the TP400 should read this Appendix carefully. In particular, note the assumptions that have been made.
H.1.3 Failure Effect Assumptions The assumption is made that each and every component failure mode will result in the failure of the TP400. This is clearly a conservative assumption. Many component failure modes, for example a 25% drift in the value of a pull-up resistor, are unlikely to have any effect on the operation of the device. H.2 RELIABILITY DATA USEAGE H.2.1 Operating Temperature This is the operating ambient temperature for the TP400, in degrees Celsius.
areas subject to minor shock, vibration and temperature or atmospheric variations. In marine applications, this is equivalent to a fixed installation inside the superstructure of the vessel. It is recommended that, unless very rigorous thermal management is a factor of the TP400 installation, that this is the most benign environment that should be used for reliability estimation. Mobile (vehicular mounted or portable and uncontrolled): Conditions more severe than Fixed, mostly for shock and vibration.
M e a n T im e T o F a ilu r e 70 60 Ye a rs 50 B e n ig n 40 F ix e d 30 M o b il e 20 10 0 25 35 45 55 65 75 T e m p e r a tu r e FIGURE H1 - TP400 MEAN TIME TO FAILURE U n it F a ilu r e R a te p e r a n n u m Fa ilure s pe r a nnum 1.2 1 0.8 B e n ig n 0.6 F ix e d 0.4 M o b ile 0.2 0 25 35 45 55 65 75 T e m p e r a tu r e FIGURE H2 - TP400 UNIT FAILURE RATE H4 164004.
Unit Failure Rate per annum Temp. in Usage Environment Degrees C Benign Fixed Mobile 0.01678 0.03355 0.1006 25 0.02096 0.04193 0.1258 30 0.02619 0.05241 0.1572 35 0.03274 0.06548 0.1964 40 0.04084 0.08169 0.2450 45 0.05087 0.10174 0.3052 50 0.06320 0.12640 0.3792 55 0.07831 0.15662 0.4699 60 0.09674 0.19349 0.5804 65 0.11912 0.23825 0.7148 70 0.14619 0.29238 0.
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APPENDIX J: TP400ET ETHERNET ADAPTER BOARD The TP400’s Ethernet chip is connected to the network’s twisted pair cable through a small printed circuit board called the TP400ET. This is joined to the TP400 with a short length of CAT5 unshielded twisted pair cable. The TP400ET contains the Ethernet isolation transformer, EMC filters and an RJ45 connector with status LEDs. The TP400ET is designed to be mounted on the enclosure; this location allows EMC filtering to be optimised.
FIGURE J1 - TP400ET MECHANICAL DRAWINGS FIGURE J2 - TP400ET CIRCUIT DIAGRAM J2 164004.
APPENDIX K: TP400 USB ADAPTER BOARD The TP400’s USB ports are accessed through a small printed circuit board called the TP300USB. This is joined to the TP400 with a short length of CAT5 unshielded twisted pair cable. The TP300USB contains EMC filters and a dual USB connector with status LEDs. The TP300USB is designed to be mounted on the enclosure; this location allows EMC filtering to be optimised. A cable assembly, the TB486ET-CAB, joins the TP400 to the TP300USB.
FIGURE K1 - TP300USB MECHANICAL DRAWINGS FIGURE K2 - TP300USB CIRCUIT DIAGRAM K2 158004.
APPENDIX L: FAULT REPORTING DSP Design makes every effort to ship products and documentation that are completely free from faults, design errors and inconsistencies. Sometimes, however, problems do show up in the field. To help us put these right as quickly and efficiently as possible, we need as much information as possible from you, the user. For this reason we have included here a “Product Fault Report” form.
PRODUCT FAULT REPORT CUSTOMER INFORMATION PRODUCT INFORMATION COMPANY NAME: PRODUCT/DOCUMENT: INDIVIDUAL CONTACT: SERIAL NO: PHONE NO: DATE OF RETURN: SYMPTOMS OBSERVED /DOCUMENTATION ERRORS (as applicable): IN WHAT CONFIGURATION IS THE BOARD USUALLY USED? (WHAT OTHER BOARDS, WHAT SOFTWARE ETC.)? FOR DSP DESIGN USE ONLY: PRODUCT TEST REPORT: DATE OF RECEIPT: REPAIRED BY: CHARGES TO BE INVOICED: £ DATE OF RETURN: L2 RETURNED BY: 158004.
