User guide

Evaluation Board User Guide UG-564
Rev. 0 | Page 17 of 32
Figure 28. Schematic, Page 9—S/PDIF Receiver
E
rror
High
Norm
On
Off
RERR
NVERR
ERRORSEMPH
PH DET RATE
V
alid
Au
di
o
>88kHz
MASTER
SLAVE
SERIAL PORT Control
128xFs
256xFs
RMCK Freq|-------- SERIAL PORT Format -------|
SFSEL [1:0]
00 = LJ 24bit
01 = I2S 24bit
10 = RJ 24bit 11 = Direct AES
1
0
1
0
SFSEL
1
SFSEL0
C6
10nF
C5
10nF
C12
C4
L4
D4
Re
d D
i
ffus
ed
R3
392R
D3
G
reen
D
iffu
se
d
R2
392R
L1
C110
1
1
A
2
1Y
U3
-
A
74
HC
04
D
-
T
3
2
A
4
2Y
U
3-
B
74 HC
04
D-
T
5
3
A
6
3
Y
U3
-C
74
HC
04
D-
T
4
RXP0
5
RXN
8
FILT
6
VA
23
VD
26
SDOUT
28
OLRCK
27
OSCLK
24
RMCK
10
RXSEL1
11
RXSEL0
12
TXSEL1
13
TXSEL0
19
C
18
U
17
RCBL
14
NV/RERR
15
AUDIO
3
RXP1
2
RXP2
1
RXP3
20
TX
16
96KHZ
21
VL
9
RST
25
OMCK
7
AGND
22
DGND
U2
CS8416
C2 22nF
C3
1.0nF
R6
3k01
C11
R125
47k5
9
4
A
8
4
Y
U
3
-D
74 HC
04
D-
T
11
5
A
10
5Y
U
3-
E
74 HC
04
D-
T
1
3
6
A
1
2
6Y
U
3
-F
74 HC
04
D-
T
D2
Yell
o
w D
iff
u
s
e
d
R1
392R
R11
150R
R12
150R
R21
150R
R10
150R
+
C10 10uF
Default
RS6
47k5
Default
RS5
47k5
2
GND
3
DVDD
1
OUT
U1
TORX147L(FT)
L3
C11
2
R4
10k0
1
2
3 4
5
6
S1
DPDT Slide
J1
CTP-021A-S-YEL
R5 75R0
R20 10k0 R9 10k0
Default
RS2
47k5
Default
RS4
47k5
Default
RS1
47k5
Default
RS3
47k5
Default
RS7
47k5
IOVDD
[5]
8416_SDATA
[5]
8416_LRCLK
[5]
8416_BCLK
[6]
8416_MCLKI
IOVDD
3V3DD
[2,6]
PU_RST
IOVDD
IOVDDIOVDD
IOVDD
3V3DD
[6]
OMCK_FEED
11588-028