Specifications

LTC4056-4.2
10
405642f
CHRG
8
2k
800k
V
CC
1
LTC4056
V
+
4056-4.2 F02
OUT
IN
µPROCESSOR
V
DD
Figure 2. Using a Microprocessor to Determine CHRG State
Recharge
If the battery voltage drops below V
RECHRG
(typically
4.05V) after a charge cycle has terminated, a new charge
cycle will begin. The recharge circuit integrates the BAT
pin voltage for approximately a millisecond to prevent a
transient from restarting the charge cycle. During a re-
charge cycle the timer will terminate the charge cycle after
one-half of the programmed time has elapsed.
If the battery voltage remains below V
TRIKL
(typically 2.8V)
during trickle charge for one-fourth of the programmed
time, the battery may be defective and the charge cycle will
end. In addition, the recharge comparator is disabled and
a new charge cycle will not begin unless the input voltage
is toggled off then on, or the TIMER/SHDN pin is momen-
tarily pulled to ground.
External PNP Transistor
The external PNP pass transistor must have adequate
beta, low saturation voltage and sufficient power dissipa-
tion capability (including any heat sinking, if required).
To provide 700mA of charge current with the minimum
available base drive of approximately 30mA requires a
PNP beta greater than 23. If lower beta PNP transistors are
used, more base current is required from the LTC4056.
This can result in the output drive current limit being
reached, or thermal shutdown due to excessive power
dissipation.
With low supply voltages, the PNP saturation voltage
(V
CESAT
) becomes important. The V
CESAT
must be less
than the minimum supply voltage minus the maximum
voltage drop across the internal sense resistor and bond
wires (0.20Ω) and battery float voltage. If the PNP transis-
tor cannot achieve the low saturation voltage required,
base current will dramatically increase. This is to be
avoided for a number of reasons: output drive may reach
current limit resulting in the charger characteristics to go
out of specifications, excessive power dissipation may
force the IC into thermal shutdown, or the battery could
become discharged because some of the current from the
APPLICATIO S I FOR ATIO
WUU
U
TRICKLE CHARGE MODE
2% FULL CURRENT
CHRG: STRONG PULLDOWN
BAT > 2.9V
2.8V < BAT < 4.05V
BAT > 4.05V
BAT < 2.8V
CHARGE MODE
FULL CURRENT
CHRG: STRONG PULLDOWN
PROGRAMMED
TIME ELAPSES
25% PROGRAMMED
TIME ELAPSES
50%
PROGRAMMED
TIME ELAPSES
STANDBY MODE
NO CHARGE CURRENT
CHRG: WEAK PULLDOWN
2.8V < BAT < 4.05V
4056-4.2 F01
RECHARGE/SHORT
CHARGE MODE
CHRG: STRONG PULLDOWN
SHUTDOWN MODE
I
CC
DROPS TO < 40µA
CHRG: Hi-Z if V
CC
< V
UVLOD
WEAK PULLDOWN
OTHERWISE
TIMER/SHDN GROUNDED
OR
V
CC
< V
UVLOD
TIMER/SHDN RELEASED
OR
V
CC
> V
UVLOI
POWER ON
Figure 1. State Diagram for a Typical Charge Cycle