Schematics

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Close to GRX350 Chip!!
Close to GRX350 Chip!!
1.An external Rref 200 ohm+/-1% resistor should be connect from the
USB RREF0, RREF1 pins to ground. Place the Rref resistor close to
RREF balls.
2.Place 2 AC coupling capacitors on USB TX pairs , <0.5inch length to
GRX350 is recommended.
3.90 ohm characteristic impedance control for USB differential signal
routing. Keep the reference plane of signal continuous.
4. Match trace length of differential pairs (_p and _n signal) to given value
in appropriate interface specification.
5. Populate sufficient GND vias nearby each PCIE differential pairs to
tighten adjacent GND plane with GND layer.
1.An external Rref 200 ohm+/-1% resistor should be connect from the 3 PCIE RREF pins to
ground. Place the Rref resistors close to RREF balls.
2.Place 2 AC coupling capacitors on PCIE TX pairs , <0.5inch length to GRX350 is recommended.
3.100 ohm characteristic impedance control for differential signal routing. Keep the reference
plane of signal continuous.
4.In case with >= 2 PCIe differential pairs routing on PCB, a footprint of shielding case to enclose
all these differential pairs is highly recommended for the compliance of EN300-328 V1.8.1
standard.
5.0.5pF capacitors to ground on PCIE RX pairs, place them close to GRX350.
6. Match trace length of differential pairs (_p and _n signal) to given value in appropriate interface
specification.
7. Populate sufficient GND vias nearby each PCIE differential pairs to tighten adjacent GND plane
with GND layer.
Close to GRX350 Chip!!
FOR WAV654
FOR WAV654
FOR VRX518
GND
GND
GND
GND GND
GND GND
GND GND
GND
GND
GND
OC_SENSE2[9]
USB_DP1[9]
USB_DM1[9]
PCIE3_CLKP [13]
PCIE3_CLKN [13]
PCIE3_TXP [13]
PCIE3_TXN [13]
PCIE3_RXP [13]
PCIE3_RXN [13]
PCIE2_CLKP_WAVE654 [16]
PCIE2_CLKN_WAVE654 [16]
PCIE2_RXP_WAVE654 [16]
PCIE2_RXN_WAVE654 [16]
PCIE2_TXP_WAVE654 [16]
PCIE2_TXN_WAVE654 [16]
PCIE1_TXN_WAVE654 [16]
PCIE1_TXP_WAVE654 [16]
PCIE1_RXP_WAVE654 [16]
PCIE1_RXN_WAVE654 [16]
PCIE1_CLKP_WAVE654 [16]
PCIE1_CLKN_WAVE654 [16]
USB_DP0[9]
USB_DM0[9]
OC_SENSE1[9]
Title
Size Document Number Rev
Date: Sheet of
GRX350_PCIE_USB
6B
V2766AX
<OrgName>
Custom
5 34Thursday, July 21, 2022
Title
Size Document Number Rev
Date: Sheet of
GRX350_PCIE_USB
6B
V2766AX
<OrgName>
Custom
5 34Thursday, July 21, 2022
Title
Size Document Number Rev
Date: Sheet of
GRX350_PCIE_USB
6B
V2766AX
<OrgName>
Custom
5 34Thursday, July 21, 2022
N.M.
C51
Null/0.5pF
C58 100nF
PCIe1
PCIe2
PCIe3
USB0
USB1
U5D
GRX350
VSSD
A14
RREF2
C12
P_cN2
A13
VSSD
C14
P_tN2
B12
P_tN3
C8
VSSD
A10
P_rN3
A8
VSSD
B14
P_cN3
B7
P_rP2
A11
P_tN1
A16
P_tP1
B16
RREF1
C15
DM1
B20
USBrP1
C19
DP1
C20
RREF0
D23
USNrN1
B19
USBtP1
A20
DM0
C22
USBrN0
B21
USBrP0
A22
VSSD
B6
USBtN1
A19
RREF1
C21
DP0
D22
USBtN0
B22
USBtP0
B23
P_rN1
B15
P_cP1
B17
P_cN1
A17
P_rP1
C16
VSSD
C17
OC_SC1
AC8
OC_SC0
AC7
P_tP2
C13
P_cP2
B13
P_tP3
B9
P_cP3
A7
P_rP3
B8
VSSD
C6
VSSD
B10
P_rN2
B11
RREF3
C7
N.M.
C52
Null/0.5pF
N.M.
C96
Null/0.5pF
R37
NULL/0/0402
R36
NULL/0/0402
R104
200R,1%
R102
200R,1%
R112
(AX)0/0402
R101
200R,1%
N.M.
C55
Null/0.5pF
R113
(AX)0/0402
C49 100nF
R39
(AX)0/0402
R115
(AX)0/0402
R114
200R,1%
C50 100nF
R38
(AX)0/0402
R116
(AX)0/0402
R108
(AX)0/0402
N.M.
C56
Null//0.5pF
C53 100nF
R109
(AX)0/0402
C54 100nF
R103
200R,1%
R110
(AX)0/0402
R111
(AX)0/0402
C57 100nF
N.M.
C94
Null/0.5pF
PCIE1_RXP
PCIE1_RXN
PCIE1_CLKP
PCIE1_CLKN
PCIE2_RXP_1
PCIE2_RXN_1
PCIE2_CLKN_1
PCIE3_RXP
PCIE3_RXN
PCIE3_CLKP
PCIE3_CLKN
NETR14_1
NETR11_1
NETR9_1
NETR13_1
OC_SENSE2
NETC133_1 PCIE1_TXP
NETC134_1 PCIE1_TXN
NETC136_1 PCIE2_TXP_1
NETC138_1 PCIE2_TXN_1
NETC163_1 PCIE3_TXP
NETC172_1 PCIE3_TXN
PCIE1_RXP
PCIE1_RXN
PCIE2_RXP_1
PCIE2_RXN_1
PCIE3_RXP
PCIE3_RXN
PCIE2_CLKP_1
USB_DP1
USB_DM1
USB_DP0
NETR10_1
USB_DM0
OC_SENSE1