Specifications

Copper Area (mm
2
)
R
TJA
C/W)
0 100 200 300 400 500 600 700 800
20
30
40
50
60
70
80
D025
4-layer PCB
2-layer PCB
TPS1H100-Q1
www.ti.com
SLVSCM2A OCTOBER 2014REVISED JANUARY 2014
7.2 ESD Ratings
VALUE UNIT
Human body model (HBM) AEC-Q100 Classification Level H3A
(1)
VS, OUT, GND ±5000
Electrostatic
V
(ESD)
Human body model (HBM) AEC-Q100 Classification Level H2
(1)
Other pins ±4000 V
discharge
Charged device model (CDM), per AEC Q100-011
(2)
±750
(1) The human-body model is a 107-pF capacitor discharged through a 1.5-kΩ resistor into each terminal.
(2) The charged-device model is tested according to AEC_Q100-011C.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
S
Operating voltage 5 40 V
Voltage on IN/DIAG_EN pin 0 5 V
Voltage on ST pin 0 5 V
I
o,nom
Nominal DC load current 0 4 A
T
J
Operating junction temperature range –40 150 °C
7.4 Thermal Information
TPS1H100-Q1
THERMAL METRIC
(1)
PWP UNIT
14 PINS
R
θJA
Junction-to-ambient thermal resistance
(2)
41
R
θJC(top)
Junction-to-case (top) thermal resistance 29.7
R
θJB
Junction-to-board thermal resistance 25.1
°C/W
ψ
JT
Junction-to-top characterization parameter 0.9
ψ
JB
Junction-to-board characterization parameter 24.8
R
θJC(bot)
Junction-to-case (bottom) thermal resistance 2.7
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The thermal data is based on JEDEC standard high-K profile JESD 51-7. The copper pad is soldered to the thermal land pattern. Also,
correct attachment procedure must be incorporated.
(1) 4-layer board: FR4 2s2p board, 2.8-mil copper (top/bottom), 1.4-mil copper (internal layers). 76.4- × 114.3- × 1.5-mm
board size.
(2) 2-layer board: FR4 2s0p board, 2.8-mil copper (top/bottom). 76.4- × 114.3- × 1.5-mm board size.
Figure 2. R
θJA
Value vs Copper Area
Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: TPS1H100-Q1