Datasheet

DEM 800480Q TMH-PW-N Production Specification
Version: 0 PAGE: 10
5.4. Timing Characteristic
AC Electrical Characteristics
Parameter
Symbol
Spec
Unit Conditions
Min.
Typ.
Max.
VDD Power ON slew rate tPOR -- -- 20 ms 0V ~ 0.9VDD
RSTB pulse width tRST 10 -- -- us CLKIN=50MHz
CLKIN cycle time tCPH 20 -- -- ns
CLKIN pulse duty tCWH 40 50 60 %
VSD setup time tVST 8 -- -- ns
VSD hold time tVHD 8 -- -- ns
HSD setup time tHST 8 -- -- ns
HSD hold time tHHD 8 -- -- ns
Data setup time
tDST
8
-- -- ns
D0[7:0], D1[7:0], D2[7:0] to
CLKIN
Data hold time
tDHD
8
-- -- ns
D0[7:0], D1[7:0], D2[7:0] to
CLKIN
DE setup time tEST 8 -- -- ns
DE hold time tEHD 8 -- -- ns
Output stable time tSST -- -- 6 us
10% to 90% target
voltage. CL=120pF,
R=10KW
CLKIN frequency fCLK -- 40 50 MHz VDD=3.0 ~ 3.6V
CLKIN cycle time tCLK 20 25 -- ns
CLKIN pulse duty tCWH 40 50 60 % TCLK
Time from HSD to Source
output tHSO --
20
--
CLKIN
Time from HSD to LD tHLD -- 20 --
CLKIN
Note (2)
Time from HSD to STV tHSTV -- 2 --
CLKIN
Time from HSD to CKV tHCKV -- 20 --
CLKIN
Time from HSD to OEV tHOEV -- 4 --
CLKIN
LD pulse width tWLD -- 10 --
CLKIN
Note (2)
CKV pulse width
tWCKV
-- 66 --
CLKIN
OEV pulse width
tWOEV
-- 74 --
CLKIN
Note: (1) VDD=3.0 ~ 3.6V, VDDA=6.5~13.5V, DGND=AGND=0V, Ta=-20~+85℃
(2) The contents of the data register are transferred to the latch circuit at the rising edge of LD.
Then the gray scale voltage is output from the device at the falling edge of LD.
(3) Output loading condition :