Datasheet

DEM 320240I TMH-PW-N (A-TOUCH) Production Specification
Version: 0 PAGE: 9
3.3.6 8080-series Interface Timing Condition
Parameter Symbol Min. Typ. Max. Unit. Remark
System Clock Frequency fMCLK 1 - 110 MHz Note
System Clock Period tMCLK 1/ fMCLK - - ns Note
Control Pulse High Width
Write
tpwcsl 13 1.5*
tMCLK
- ns
Control Pulse High Width
Read
tpwcsl 30 3.5*
tMCLK
- ns
Control Pulse Low Width
Write(next write cycle)
tpwcsh 13 1.5*
tMCLK
- ns
Control Pulse Low Width
Write(next read cycle)
tpwcsh 80 9*
tMCLK
- ns
Control Pulse Low Width
Read
tpwcsh 80 9*
tMCLK
- ns
Address Setup Time tas 1 - - ns
Address Hold Time tah 2 ns
Write Data Setup Time tdsw 4 - - ns
Write Data Hold Time tdhw 1 - - ns
Write Low Time tpwlw 12 - - ns
Read Data Hold Time tdhr 1 - - ns
Address Time tacc 32 - - ns
Read Low Time tpelr 36 - - ns
Rise Time tr - - 0.5 ns
Fall Time tf - - 0.5 ns
Chip select setup time tcs 2 - - ns
Chip select hold time to
read signal
tcsh 3 - - ns
Note : System Clock Denotes external input clock(PLL-bypass) or internal generated clock(PLL-enabled)
Reference input clock=10MHz.
About Command setting , Please refer to SSD1963.