Product specifications

R01AN0168ED0101 Rev. 01.01 19
Application Note
Chapter 4 Automated Motor Movement
CZCn has reached the end of the table marked by ZPD table index limit CTLn,
the counter
CZCn is reset to zero again.
Like this, each entry of the
PWM Value RAM ZPD table may have an execution
time of
CZDn, which is a 5-bit value in counts of the frequency of START (the
Update Timebase). Subsequent equal entries can be put into the table, in
order to get longer delay times.
On
ZMTn is set, the ZPD Blanking activates ZTRn after its delay of ZBTn
cycles of the ZPD measurement frequency
f
m
. Then, on ZTRn, the ZPD
measurement is activated, using
ZISn as parameter.
The ZPD Unit now will perform ZPD measurements for this channel
(concurrently with other channels), until
ZTRn is cancelled again, caused by
the
Sequencer, which cancels ZMTn according to a ZPD table entry. On
cancelling,
ZTRn immediately follows ZMTn. In case that the ZPD does not
detect the zero position (level was at least once above the threshold), it
activates the corresponding flag
ZIPn for this channel.
If the ZPD measurement process is stopped, because
ZMTn of the current
channel is cleared (
ZMTn of the corresponding ZPD table entry is cleared), but
zero position was not detected meanwhile (
ZIPn is set), the ZPD mode
continues by processing the ZPD table from the PWM Value RAM.
If the signal
ZIPn is not set for a channel, at the time point when ZMTn is
cancelled, the ZPD mode for this channel is left automatically by clearing
CZPn, and disabling the channel by clearing CENn. This will cause, that the
channel is not processed any more, unless it is reactivated.
The value of
CZCn is forwarded to the Address Generation Block.
Using
CZCn, the Address Generation block creates an access address to the
PWM Value RAM. Like this, the ZPD table index values are translated into
PWM and output control settings. The
Sequencer fetches the values CVPn,
CHPn, CQIn, IHRn, IVRn, IHEn, IVEn, IHDn, IVDn, IHRn, IVRn, ZMTn and
CZDn
from the RAM and writes them into the appropriate register settings of
the ISM channels, where the result becomes visible as changed PWM and/or
output settings.
In summary, for each time-event of the
Update Timebase (GUD), a new ZPD
table index is calculated for each activated channel, and by a look-up table in
the
PWM Value RAM, this is translated into PWM and output control values for
the channels.
With the next ZERO event, the new values for the PWM settings (
CVPn,
CHPn, CQI
n) and I/O control (IHRn, IVRn, IHEn, IVEn, IHDn, IVDn) will
become active at the outputs. The ZERO event is the synchronous start of a
new PWM cycle. The
Sequencer is designed such, that it is capable to
complete all processing of all channels within one PWM cycle.
After completion, the
Sequencer stops in an idle state and waits on the next
START event.
The ZPD mode operation is shown graphically in the following flowchart.